2025-10-20 10:40 AM
Hello,
maybe this is bit off-topic, but does anybody know if it is possible to suspend an ERASE operation and write to another (previously erased) sector?
I want to save a page in flash in case of a power outage and want to interrupt a probably ongoing ERASE.
If so, is this possible in internal flash or only in external flash?
In our design there are 2 QUAD SPI NOR flash connected to the dual QSPI- and one QUAD SPI NOR to a SPI interface of the STM32H75x. It would be surely possible to write to an idle flash while the other is busy erasing a sector. But it would be nice if write-while-erase-suspended would work on a single flash.
The documentation of flash is confusing e.g. in the MICRON flash, which is soldered on the STM32H753_EVAL board, it seems there is difference in sector erase and erase command:
The MACRONIX AN0247 says that programming is allowed
but the datasheet says that only read is allowed in suspended state
Any experience here, has anybody checked this out?
Solved! Go to Solution.
2025-10-23 6:39 AM
Got my suspend/resume test working. I experienced two problems with the MT25QL. First, writing to flash after erase suspend works not for 4kB sectors. Now I use 64kB sector erase. Second, the program must wait for the WIP bit cleared after erase suspend before issuing a page write. It is not sufficient to wait for the erase suspend bit set only. The MT25QL maintains a negated copy of the WIP status register bit in the flag register. So both bits must be verified by reading the flag register. First I did not wait for WIP cleared and the following write did not succeed. The write seemed to be ignored because the program failure bit was not set.
Yes, flash management is getting quite complex. Besides the mentioned EE emulation with "emergency write", in normal operation there are asynchronous accesses to flash resources from multiple threads which must be synchronized. These read/write requests also have a higher prio than the "garbage collector" running data copy and sector erases in the background. This will require a statemachine and thread synchronization.