Low-power management reset

[tlamotte9]

Posted on February 07, 2014 at 16:45

Dear All,

I would need help to understand one feature of the STM32F10x or STM32F2xx: I do not understand the purpose of the ''reset that can be generated when entering the Standy or Stop mode'': What is the reason for generating a reset in such cases? I do not see for what kind of application this feature could be used. If anyone had hints about that, I thank you. Regards, Thierry

[Tesla DeLorean]

Posted on February 07, 2014 at 16:59

Standby exits via a reset because it's turned everything off (clocks, regulator), and things are left in an indeterminate state. The reset lets you reinitialize the memory, peripherals, etc as the system restarts.

[tlamotte9]

Posted on February 08, 2014 at 08:48

Thanks you Clive,

I understand quite well what you are explaining me. When I am reading the Reference Manual 'e.g. RM0033 September 2013 DocID15403 Rev 6), at the chapter 5.1.1System reset: Low-power management reset There are two ways of generating a low-power management reset: 1. Reset generated when entering the Standby mode: This type of reset is enabled by resetting the nRST_STDBY bit in the user option bytes. In this case, whenever a Standby mode entry sequence is successfully executed, the device is reset instead of entering the Standby mode. 2. Reset when entering the Stop mode: This type of reset is enabled by resetting the nRST_STOP bit in the user option bytes. In this case, whenever a Stop mode entry sequence is successfully executed, the device is reset instead of entering the Stop mode. My reading is that it does not mention the ''exit'' of the mode but explicitely mention the ''entry'' in the low-power mode: That is why I submited this new forum item. Sorry I am still confused about this feature. Regards, Thierry