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Interrupt for Output Compare no Output does not trigger - Need diagnostics

KHarb.1
Senior

I have TIM20 configured in reset mode with CH1 as the trigger. I want an interrupt to run if the counter reaches a certain value. I’m using CubeIDE with CH2 configured with Output Compare no Output and the pulse duration set to the desired compare value. None of the other channels are used. I haven't used output compare features before and I'm likely missing something simple.

I’m not seeing the interrupt run. I can see an input square wave on my scope. If dump TIM20->CNT to the DAC I can see it count up and reset on the edges as expected. The ramp crosses the capture compare value, so I know the value is being hit, but I don't see the interrupt trigger.

 

When using Cube Programmer to read the registers:

I see TIM20-> DIER  CC2IE bit is set.

I see TIM20->SR CC2IF set to 0 and all the other CCxIF bits set to 1. I clear CC2IF in the interrupt so it makes sense its clear, but why would the others be set?

 

I start TIM20 with the following lines:

HAL_TIM_Base_Start_IT(&htim20);
HAL_TIM_OC_Start_IT(&htim20,TIM_CHANNEL_2);

 

This is my interrupt code:

TIM20_IT_CNT++;
DAC1->DHR12R2 = (TIM20->CNT%2)*0xFFF; //generates square wave for observable output
TIM20->SR &= 0xFFFFFFFB; //resets the interrupt flag

 

IOC attached

 

What am I doing wrong?

 

1 ACCEPTED SOLUTION

Accepted Solutions
Sarra.S
ST Employee

Hello @KHarb.1

>>I see TIM20->SR CC2IF set to 0 and all the other CCxIF bits set to 1. I clear CC2IF in the interrupt so it makes sense its clear, but why would the others be set?

You're setting the other bits with the mask 0xFFFFFFFB

The correct way to clear the flag in status register is TIM20->SR &= ~(TIM_SR_CC2IF);

 

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.

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1 REPLY 1
Sarra.S
ST Employee

Hello @KHarb.1

>>I see TIM20->SR CC2IF set to 0 and all the other CCxIF bits set to 1. I clear CC2IF in the interrupt so it makes sense its clear, but why would the others be set?

You're setting the other bits with the mask 0xFFFFFFFB

The correct way to clear the flag in status register is TIM20->SR &= ~(TIM_SR_CC2IF);

 

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.