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how to design wakeup voltage of STM32F072xB WKUP PA0 port

Henry1314
Associate II

from datasheet " The wakeup source from Sleep and Stop mode is an EXTI line configured in event mode.

The wakeup source from Standby mode is the WKUP1 pin (PA0); The device exits Standby mode when an external reset (NRST pin), an IWDG reset, a rising edge on the WKUP pins, or an RTC event occurs"

According to description above ,   if I use a rising edge on the WKUP pins, how big rising edge voltage need to supply to wake up MUC from standby mode?

looking forward your response! I will appreciate that!

1 ACCEPTED SOLUTION

Accepted Solutions
Andrew Neil
Super User

See the standard logic-level definitions for the pin - in the datasheet.

 

PS:

AndrewNeil_0-1745573869608.png

https://www.st.com/resource/en/datasheet/stm32f072rb.pdf#page=79

via: https://www.st.com/en/microcontrollers-microprocessors/stm32f072rb.html#documentation

AndrewNeil_1-1745573963577.png

 

 

A complex system that works is invariably found to have evolved from a simple system that worked.
A complex system designed from scratch never works and cannot be patched up to make it work.

View solution in original post

4 REPLIES 4
Andrew Neil
Super User

See the standard logic-level definitions for the pin - in the datasheet.

 

PS:

AndrewNeil_0-1745573869608.png

https://www.st.com/resource/en/datasheet/stm32f072rb.pdf#page=79

via: https://www.st.com/en/microcontrollers-microprocessors/stm32f072rb.html#documentation

AndrewNeil_1-1745573963577.png

 

 

A complex system that works is invariably found to have evolved from a simple system that worked.
A complex system designed from scratch never works and cannot be patched up to make it work.
could please help find this value? I am confused by I/O voltage and rising edge voltage

"Rising edge" simply means a transition from a valid logic low level to a valid logic high level

                         __________________ Logic High
                        |
                        |
                        |
Logic Low ______________|
                        ^
                        ^
                        Rising Edge 

 

A complex system that works is invariably found to have evolved from a simple system that worked.
A complex system designed from scratch never works and cannot be patched up to make it work.

  I think MCU detects rising edge determined by Logic high voltage level and ramp up time.

  I am hardware engineer So I need to know the Logic high voltage level, follow your info the 0.445VDDIOx+0.398V is right?