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G474 clarification about RM0440 "3.3.5 Flash program and erase operations"

Associate II

I have developed a program that performs IAP (In-Application Programming). I am using single bank mode.
The manual states:
"An on-going Flash memory operation does not block the CPU as long as the CPU does not access the same Flash memory bank."
However, I didn't notice any problem.
My program runs in the address range 0x8000000-0x8010000 and the IAP programs the higher addresses.
If the CPU is blocked what happen? If my program can wait I have to care just about watchdog?


Thank you


Best Regards


ST Employee

Dear @marcopiovesan9 ,


Yes, the CPU will be stalled the time the flash programming/erase operations will complete and should work properly if during the same time ( IAP) no critical Interrupts / ISR should be served in same time , you can move them to SRAM and should  run perfectly .



With watch-dogs, it's the erase that usually catches you. Check the typical-maximum time for the sector/page erase

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