FDCAN with BRS does not work with IXXAT CAN Analyser. But works without!!

[Qin1]

I am using STM32G491RE - NUCLEO.
Similar to this post - ( https://community.st.com/t5/stm32-mcus-products/reading-data-with-brs-on-fdcan-line/m-p/745625#M266951)

I implemented the function of receiving and transmitting data from the FDCAN line.

I configured my FDCANs with BRS mode everything works fine, the only change that causes errors is when I switch TxHeader.BitRateSwitch = FDCAN_BRS_OFF to ON. Then the FIFO fill up like the chip is not receiving ACK with just this change.

int main(void)
{
.....
MX_FDCAN2_Init();
FDCAN_Config();
while (1)
{
   while (HAL_GPIO_ReadPin(BTN_GPIO_Port, BTN_Pin) == KEY_PRESSED)
   {
      ......
      if (HAL_FDCAN_AddMessageToTxFifoQ(&hfdcan2, &TxHeader, TxData) != HAL_OK)
      {
	 uint32_t psr = hfdcan2.Instance->PSR;
	 Error_Handler();
      }
      HAL_Delay(10);
   }
}}

static void MX_FDCAN2_Init(void)
{
  hfdcan2.Instance = FDCAN2;
  hfdcan2.Init.ClockDivider = FDCAN_CLOCK_DIV1;
  hfdcan2.Init.FrameFormat = FDCAN_FRAME_FD_BRS;
  hfdcan2.Init.Mode = FDCAN_MODE_NORMAL;
  hfdcan2.Init.AutoRetransmission = ENABLE;
  hfdcan2.Init.TransmitPause = ENABLE;
  hfdcan2.Init.ProtocolException = DISABLE;
  hfdcan2.Init.NominalPrescaler = 2;
  hfdcan2.Init.NominalSyncJumpWidth = 17;
  hfdcan2.Init.NominalTimeSeg1 = 67;
  hfdcan2.Init.NominalTimeSeg2 = 17;
  hfdcan2.Init.DataPrescaler = 5;
  hfdcan2.Init.DataSyncJumpWidth = 6;
  hfdcan2.Init.DataTimeSeg1 = 10;
  hfdcan2.Init.DataTimeSeg2 = 6;
  hfdcan2.Init.StdFiltersNbr = 0;
  hfdcan2.Init.ExtFiltersNbr = 0;
  hfdcan2.Init.TxFifoQueueMode = FDCAN_TX_FIFO_OPERATION;

 HAL_FDCAN_Init(&hfdcan2)
}

static void FDCAN_Config(void)
{
  FDCAN_FilterTypeDef sFilterConfig;
  sFilterConfig.IdType = FDCAN_EXTENDED_ID;
  sFilterConfig.FilterIndex = 0;
  sFilterConfig.FilterType = FDCAN_FILTER_RANGE;
  sFilterConfig.FilterConfig = FDCAN_FILTER_TO_RXFIFO0;
  sFilterConfig.FilterID1 = 0x321;
  sFilterConfig.FilterID2 = 0x1FFFFFFF; // 0x7FF;

  HAL_FDCAN_ConfigFilter(&hfdcan2, &sFilterConfig)
  HAL_FDCAN_ConfigTxDelayCompensation(&hfdcan2, (hfdcan2.Init.DataTimeSeg1 + 3), 0U)
  HAL_FDCAN_EnableTxDelayCompensation(&hfdcan2)
  HAL_FDCAN_Start(&hfdcan2)
  HAL_FDCAN_ActivateNotification(&hfdcan2, FDCAN_IT_RX_FIFO0_NEW_MESSAGE, 0)

  TxHeader.Identifier = 0x321;
  TxHeader.IdType = FDCAN_EXTENDED_ID;
  TxHeader.TxFrameType = FDCAN_DATA_FRAME;
  TxHeader.DataLength = FDCAN_DLC_BYTES_2;
  TxHeader.ErrorStateIndicator = FDCAN_ESI_PASSIVE;
  TxHeader.BitRateSwitch = FDCAN_BRS_ON;      /*****THIS OVER HERE********/
  TxHeader.FDFormat = FDCAN_FD_CAN;
  TxHeader.TxEventFifoControl = FDCAN_NO_TX_EVENTS;
  TxHeader.MessageMarker = 0;
}

When I select BRS_ON specifically only on TxHeader, the code runs for 3 loops and on the 4th it enters error_handler at HAL_FDCAN_AddMessageToTxFifoQ. When it is OFF the code runs fine.

I set the Nominal phase to 1Mbps.
I set the Data phase to 2Mbps.

The can transceiver I use is ADM3055EEBZ which is capable of going up to12Mbps, 150ns propagation delay.

I am using the HSE available on the nucleo board at 170MHz.

I even check for the termination resistor on both end of the CANH and CANL both ends at 120 ohms. 

But I don't know what went wrong. Can anyone explain in more detail? @mƎALLEm Please help me 

Thanks in advance!

[Qin1]

This is my KVASER calculation for the FDCAN config

Nominal PSC = 2
Data PSC = 5

https://kvaser.com/support/calculators/can-fd-bit-timing-calculator/?v=0.12&nbr=1000000&dbr=2000000&nsjw=34&dtps1=54&dtps2=30&f=170000&t=50&d=150&np=2&dp=5

[LCE]

1) Have you enabled the FDCAN's transceiver delay compensation (TDC) ?

2) All bit time settings for all devices must beidentical when using BRS, also for the "slow" arbitration bit rate!

That's because of the sync mechanism when going from slow to BRS, the slow rate sampling point must be the same for all devices.

And that's probably why it works between 2 STM32 devices with the same settings, but not with your extra adapter.

[Qin1]

Yes I have enabled it like this 

HAL_FDCAN_EnableTxDelayCompensation(&hfdcan2)

I have managed to fix that TxHeader issue as I found out that Data Prescalar only works with values 1 & 2 (which in my case I have selected 5). Since my Clock frequency is 170MHz the tq value becomes an odd number if I want Data speed at 2Mbps with a PSC of 2. 

So my change that I have made that fixed this was switching clock frequency to 160MHz which is easily divisible and switching DATA PSC to 2 and I can use BRS. 

However I still have an issue on my IXXAT can Analyser side where the system is able to receive message from the STM and transmit non-BRS messages but when I transmit a message with BRS format it just hangs the whole system with Errors.

[mƎALLEm]

---

@LCE wrote:

2) All bit time settings for all devices must beidentical when using BRS, also for the "slow" arbitration bit rate!

That's because of the sync mechanism when going from slow to BRS, the slow rate sampling point must be the same for all devices.

And that's probably why it works between 2 STM32 devices with the same settings, but not with your extra adapter.

---

This is almost what you have faced here, in this thread  ;)

@Qin1 please refer to that thread already posted by @LCE 

[Qin1]

Ok I managed to solve the issue but I don't quite understand how.

So I basically changed my offset in 
HAL_FDCAN_ConfigTxDelayCompensation(&hfdcan2, (hfdcan2.Init.DataTimeSeg1 * hfdcan2.Init.DataPrescaler), 0U)

to 
HAL_FDCAN_ConfigTxDelayCompensation(&hfdcan2, (hfdcan2.Init.DataTimeSeg1 + 1), 0U)

And it suddenly works!! 

[LCE]

Still, better check the IXXAT can Analyser bit time settings and copy these.

And from my experience - unless you will only ever use it on one CAN bus - make the bit time settings editable, at least by UART.

[LCE]

> HAL_FDCAN_ConfigTxDelayCompensation(&hfdcan2, (hfdcan2.Init.DataTimeSeg1 + 1), 0U)

That this works is coincidence, the delay compensation is a hardware thing depending on your transceiver.

So if you change Tseg1, then this might again not work.

I would test it also at 8 Mbit/s.