2025-12-03 9:39 PM - edited 2025-12-03 9:40 PM
Hello,
I’m working with an STM32H723 MCU and have a question about Flash behavior when caches are enabled.
Both D-Cache and I-Cache are enabled, and I’m not using any additional MPU configuration.
I'm using D-Cache invalidate after a Flash erase operation.
Do I also need to invalidate the D-Cache after a Flash write?
Below is my current code. The D-Cache invalidate is commented out.
everything works fine, but I want to prevent any potential issues in the future.
static int32_t flash_write_words(uint32_t addr, uint32_t *data)
{
volatile uint32_t *flash = (uint32_t *)addr;
const uint32_t num_words = FLASH_NB_32BITWORD_IN_FLASHWORD;
// check erased
for (uint32_t i = 0; i < num_words; i++)
{
if (flash[i] != 0xFFFFFFFFU)
{
return -1;
}
}
// write words
if (HAL_FLASH_Program(FLASH_TYPEPROGRAM_FLASHWORD, addr, (uint32_t)data) != HAL_OK)
{
return -1;
}
// SCB_InvalidateDCache_by_Addr((uint32_t *)addr, 32U);
return 0;
}