I want to print out 5 waveforms during 1us.So, I printed out 5 MHz period PWM from TIM3.We tried to change the duty cycle of TIM3 to zero at interrupt time by running a 1 MHz timer counter on TIM6. However, it was confirmed that TIM6's 1 MHz timer co...
I think the article here:https://community.st.com/s/article/FAQ-DMA-is-not-working-on-STM32H7-devicesis wrong. In solution 3 it invalidate D-cache before reception. This doesn't make sense, it has to invalidate the D-cache after reception.
Hi,I have a custom board with STM32L010. I used STM32 cubeMX to initialize the GPIO,I2C,SPI,ADC,USART,LPTIM2,CRC,DMA and RTC. Then I de-initialize everything except GPIO and put the controller in sleep mode. The current consumption still is 250 uA af...
I'm using this code to read from a flash chip with quad SPI: // send read command and read page data OSPI_RegularCmdTypeDef sCommand; memset(&sCommand, 0, sizeof(sCommand)); sCommand.OperationType = HAL_OSPI_OPTYPE_COMMON_CFG; sCommand.FlashId = ...
Hello,As mentioned in Errata sheet of STM32L4xxx, the auto polling mode is not functional. This mode allows an automatic polling fully managed by hardware on the memory status register. The workout in the Errata sheet is to use memory-mapped mode, bu...
Posted on February 12, 2018 at 19:29I'm about to use a STM32F7 MCU with some x16 SDRAM. Since I don't use byte or unaligned accesses, I disabled the NBL pins, which should otherwise be connected to DQMH/L at the SDRAM.But if I don't use those signal...
I am using the STM32F429 and interfacing some SDRAM which i have done before with no problem but in 16 bit mode. So the NBL0 and NBL1 where connected to the SDRAM and the system works very well. Due to needing a few extra pins for general IO i am dro...
I have created an IAP to load our application and jump to the application which appears to work as expected when the IAP is run from the IDE Debugger. Now I need a way to jump from the application to the IAP to instigate the loading of a new applicat...
HiIn your Reference Manual for the STM32F469 at 31.3.11 it says:A DMA access is requested when the TXE or RXNE enable bit in the SPIx_CR2 register is set.But the SPIx_CR2 Register does not have a TXE/RXNE bit, it has a TXEIE/RXNEIE bit which just en-...
