2025-11-12 2:41 AM
In the above image (logic analyzer) , SPI in DMA was supposed to start at the end of high on the second signal, but it starts a bit later. (3rd signal CS of SPI, 4th signal SCLK)
And the SPI was to supposed to be active at every period (the first signal) whose period is 8.607us.
The second signal is a slave timer to the first and a period elapsed callback of this signal call HAL_SPI_Receive_DMA.
There is also a 1 second timer
What should i do to correct this? I don't how to proceed, any solutions, learning materal would be really helpful