1. To calculate the speed, you have to read the counter periodically (e.g. from the SysTick interrupt) and calculate the speed from the difference. More precision can be achieved by reading the counter with a DMA request triggered by another timer. Hardware methods won't work, anything I can think of would be fooled if the wheel is almost stopped, and oscillating around a single position.
2. It is called update interrupt, it can be generated by setting the UIE bit in TIM3->DIER. There should be a HAL interface to do this, but I'm not surprised that you couldn't find it, HAL is very poorly documented (one of the reasons I don't use it).
TIM3->DIER |= TIM_DIER_UIE;
NVIC_EnableIRQ(TIM3_IRQn);
Then the interrupt handler must examine and clear the update interrupt flag.
void TIM3_IRQHandler(void) {
uint32_t sr = TIM3->SR;
if(sr & TIM_SR_UIF) {
TIM3->SR = ~TIM_SR_UIF;
/* do whatever needs to be done at counter overflow */
}
}
3. There is no such flag, but it should be possible to create one with DMA (I haven't tried it, but I'm quite sure that it would work). However, because of the unfortunate DMA request map of the STM32F1, it would actually work on TIM1, TIM2 or TIM4, but not on TIM3. (It requires a DMA request on one of the inputs, not shared by the trigger).
Find the DMA channel for timer channel 1 in the DMA request mapping table of the reference manual.
Configure the DMA channel to transfer a 32-bit word from the IDR register of the GPIO port where the channel 2 pin in located to a volatile uint32_t variable in circular mode: CNDTR=1, CPAR=&GPIOx->IDR, CCR=DMA_CCR_MSIZE_1 | DMA_CCR_PSIZE_1 | DMA_CCR_CIRC | DMA_CCR_EN, CMAR=the address of the variable.
Enable capture on channel 1 (TIM_CCER_CC1E) and DMA request generation (TIM_DIER_CC1DE).
Now DMA will copy the pin state of the channel 2 pin on every rising edge of channel 1. Direction of counting depends on the state of the other pin, so the bit value at the pin position in the DMA target variable will reflect the direction of counting at the last edge on channel 1.
4. The timer samples its inputs once in every timer clock cycle (which usually equals the system clock frequency on the STM32F1, but check your clock setup). It will work as long as the frequency of changes in the combined input state is less than the timer clock frequency.
