Hello All,
Attached is the snapshot taken using logic analyser on PWM & Hall Effect TTL Signals. Trying with 446 & IHM08M1 – Open Loop.
D0 – PWM1 & D1 – PWM1 N
D2 – PWM2 & D3 – PWM2 N
D4 – PWM3 & D5 – PWM3 N
D6 – Hall Effect U
D7 – Hall Effect V
A0 – Hall Effect W (No extra digital channel, using the analog channel as digtal).
Practical Explanation Required at each cycle.
D6 rising edge makes PWM1 & PWM1N to operate until D3 rising edge –which winding is energised?
Like this, explanation required for 1 full cycle wrt to Phase Energising.
