2026-04-30 1:01 PM
I have a project where a STM32U575VGT must convert a SSI multiturn encoder value into a parallel single turn value for GPIO output. The SSI values are 3 bytes long, and it would be best if the CPU is only interrupted when the last 2 values differ. I have set up SPI2 to have GPDMA channels for TX and RX (although only RX is needed). DMA transfers work, but when I try to enable autonomous mode with LPTIM1 Channel 1 as a trigger, there are no interrupts for SPI2 or the DMA channels. How do I trigger the SPI read every ~1ms? Is this something only achievable with the LL libraries rather than HAL? Is it possible to interrupt the CPU only if the 3 bytes read from the SPI differ from the previous value?
2026-05-01 12:51 AM
>How do I trigger the SPI read every ~1ms?
You could use a timer , but if just 1ms is ok: use the systick int , write there just the HAL command to start the gpdma transfer...thats it.
> Is it possible to interrupt the CPU only if the 3 bytes read from the SPI differ from the previous value?
No, somebody has to compare the old--new values and decide then; this is a simple job for the cpu.
So just use the dma finished int , compare there the 3 bytes and decide "set new value "or not.
Maybe needs some 16 cpu clocks or so, thats so fast, you will not notice it ...
and dont forget to set optimizer , -O2 (i use always), to get the best speed of an arm cpu.
And you can ask the sidekick Ai here, how to do in detail: klick on
and ask:
To start a GPDMA transfer in a SysTick interrupt, you need to ensure the DMA channel is properly configured before enabling the transfer. The general approach is:
The procedure to trigger a DMA transfer from an interrupt handler (such as SysTick) involves:
To configure and start a GPDMA transfer in STM32:
To start a GPDMA transfer in a SysTick interrupt:
For additional support or to discuss your specific application with ST experts, you’re welcome to join conversations in STM32 forums.
2026-05-01 6:13 AM
Thank you for the reply. It doesn't seem like a big CPU load, but the comparison and restarting the SPI in interrupt mode or DMA mode is enough to cause problems with a motor control routine the microcontroller is also running. This is why I want to have this functionality operate as autonomously as possible.
2026-05-01 6:55 AM
Primary add info, work your SPI data source as master or slave, or oposite work STM as master or slave?
2026-05-05 6:05 AM
The SPI is configured as a master in receive only mode. I have an unused TX DMA channel set up because it seems to be needed by the HAL driver.
2026-05-05 6:36 AM
Ok then your MCU is master, but SPI cant receive as master without send. Then blk
TIM TRGO
↓
DMAMUX
↓
DMA TX (dummy byte)
↓
SPI -> clock out
↓
SPI RX
↓
DMA RX
2026-05-06 6:13 AM
Does the STM32U5 have DMAMUX? Does it matter for your flow chart?
2026-05-08 9:09 AM
I found a demo SPI_FullDuplex_ComDMA_Autonomous_Master in the STM32CubeU5 package. It targets a similar STM32U575 device on the NUCLEO-U575ZI-Q board. I don't see any output on the SPI SCK pin when I use STM32CubeMX to retarget the microcontroller to the STM32U575VGT I am using and change SPI1 to SPI2. Using SWD I don't see any interrupts in the interrupt log.
2026-05-08 10:56 PM
Yes this example is good start, but isnt simple change SPI1 to SPI2 ... better is attach here ioc file as minimum.
2026-05-13 8:02 AM