2025-11-15 2:41 AM - last edited on 2025-11-15 3:29 AM by AScha.3
Hey,
I tried to follow all the steps of this thread as good as possible. Still I have a faulty SAI Perpheral. The Problem is that the generatet FSYNC and BCK are too low. They are both also dependent on the PLL Frequency. For example if i set IC7 so that it has 12.288MHz the FSYNC is 2kHz (insted of 48kHz) and BCK is 512kHz (instead of 12.288 MHz).
When i set IC7 to 192MHz FSYNC is 31.3kHz and BCK is about 8MHz. Also if I set any other clock channel than IC7 to feed the SAI1 Peripheral, then there won't be any FSYNC or BCK anymore.
The D-Cache is working and doesn't give me an error as i followed this post: https://community.st.com/t5/stm32-mcus-embedded-software/stm32n6-using-dcache-with-freertos-and-sai-gpdma-usage/m-p/850823/highlight/true#M69398
I am running everything in Appli. Here are the settings:
SAI Setting:
GPDMA1 Setting:
2025-11-15 3:35 AM
Hi,
i moved your post, because you posted it in response to someone else's question; now here its your question.
+
Please explain: what you want connect to SAI and what should it do ?
- Because : free format, 256bit frame, 8 slots - no idea, what this should be.
2025-11-15 3:38 AM
Here is a short answer you can post:
Your FSYNC/BCK are wrong because SAI1 is not receiving the correct kernel clock. On STM32N6 you must configure RCC → SAI12CKSELR.SAI1SRC manually; enabling only SAI1EN is not enough.
If IC7/IC8 are not fully enabled in audio mode + divider chain, SAI falls back to a very low clock → exactly the 1/24 scaling you see (2 kHz instead of 48 kHz, 512 kHz instead of 12.288 MHz).
Also check your frame length / slot config, because a wrong FRL (e.g., 768 bits) also divides FSYNC.
Fix:
Set SAI1SRC properly.
Enable IC7 audio mode + divider fully.
Set frame length = 256 bits, slot = 32 bits.
After correcting the kernel clock + frame length, FSYNC and BCK will output the correct frequencies.
2025-11-15 10:30 AM
Hi,
thank you for organizing it and your message.
The SAI is used for reciving 8 audio channels form two 4 Channel ADCs that work together. The ADCs are Slaves. I once managed to get something similar working on a H7 but the N6 still is a challenge.
Nevertheless it also behaves like described above when I only configure it to two channels. Either way the ADCs are currently not connected and I would first of all just like the peripheral to work as expected.
2025-11-15 11:34 AM
Hey just a quick update: Moving SAI and GPDAM1 to FSBL made the peripheral work exactly as expected. But shouldn't it be in the Appli part of the programm?