Question about the MPU configuration in the CubeH7 examples

[CiuppaPT]

Thread split from this one.

In all examples found on the ST rapository concerning the MPU_config in addition to the background configuration to prevent that speculative access issue, there is also the following initialisation. Could you tell me what this concerns and whether it is essential since it is present in almost all MPU_configs of the various platforms?

/* Configure the MPU attributes FMC control registers */
  MPU_InitStruct.Enable = MPU_REGION_ENABLE;
  MPU_InitStruct.Number = MPU_REGION_NUMBER7;
  MPU_InitStruct.BaseAddress = 0xA0000000;
  MPU_InitStruct.Size = MPU_REGION_SIZE_8KB;
  MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS;
  MPU_InitStruct.IsBufferable = MPU_ACCESS_BUFFERABLE;
  MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE;
  MPU_InitStruct.IsShareable = MPU_ACCESS_SHAREABLE;
  MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;
  MPU_InitStruct.SubRegionDisable = 0x0;
  MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_DISABLE;

  HAL_MPU_ConfigRegion(&MPU_InitStruct);

example from the  

[Dor_RH]

Hello @CiuppaPT,

To better assist you, could you please specify which STM32Cube firmware projects you are working with?

Thank you for your collaboration.

Dor_RH

[CiuppaPT]

I am referring to all projects in the ST repository. I will take one at random that refers to a video architecture like the one I implemented on my proprietary board. (Frame buffer in SDRAM with FMC and LCD controlled by LTDC via DMA2D).
One project that includes graphics management is the following, where MPU_config() contains the following initialisation, which also seems to be present in other projects that use FMC. I think, until recently (perhaps a few years ago), cubeMx did not generate this initialisation in projects with FMC.

https://github.com/STMicroelectronics/STM32CubeF7/blob/master/Projects/STM32746G-Discovery/Applications/Display/LTDC_PicturesFromSDCard/Src/main.c 

[Khaled_DHIF · Accepted solution]

Hello @CiuppaPT ,

The MPU region at 0xA0000000 is for the FMC control registers on STM32F7. By default, this space is already treated as Strongly ordered (non-cacheable, non-bufferable), but the explicit MPU region is added to overlap the background configuration because an external memory is mounted. For this, an additional MPU region is added to configure the FMC control register address range as Device (non-cacheable, bufferable).

It looks like you were referring to the Cube H7 at first, but on the F7 the same principle applies, the region is there to ensure safe and predictable FMC register access.

For more information, check the application note AN4838. 

Kind regards,