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openbootloader configuration file conversion to F413

Andrew C
Associate III

I am trying to convert the G491re openbootloader example to the F413 mcu. I take it that everything that needs to changed is in the openbootloader_conf.h  file. 

I believe I have the correct map configuration as shown below, but I am confused as how I figure out how to define the parameters at lines 74 and beyond. Are those just command codes? Also, how does the bootloader know there is only 1 bank instead of 2 like in the example?

/**
  ******************************************************************************
  * @file    openbootloader_conf.h
  * @author  MCD Application Team
  * @brief   Contains Open Bootloader configuration
  ******************************************************************************
  * @attention
  *
  * Copyright (c) 2019 STMicroelectronics.
  * All rights reserved.
  *
  * This software is licensed under terms that can be found in the LICENSE file
  * in the root directory of this software component.
  * If no LICENSE file comes with this software, it is provided AS-IS.
  *
  ******************************************************************************
  */

/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef OPENBOOTLOADER_CONF_H
#define OPENBOOTLOADER_CONF_H

/* Includes ------------------------------------------------------------------*/
#include "platform.h"

/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/

/* -------------------------------- Device ID ------------------------------- */
//devide ID for F413 is 0x463

#define DEVICE_ID_MSB                     0x04              /* MSB byte of device ID */
#define DEVICE_ID_LSB                     0x63              /* LSB byte of device ID */

/* -------------------------- Definitions for Memories ---------------------- */
//This F413 has 1.5MB
#define FLASH_START_ADDRESS               FLASH_BASE
#define FLASH_END_ADDRESS                 (FLASH_BASE + (1500 * 1024))


// This F413 has 256kb (SRAM1) + 64kb (SRAM2)
#define RAM_START_ADDRESS                 SRAM_BASE
#define RAM_END_ADDRESS                   (SRAM_BASE + (320 * 1024))   /* Size of SRAM1 + SRAM2 (80 + 16) */

//F413 has a different starting area than G4
// 0x1FFFC000 to 0x1FFFC00F
#define OB1_START_ADDRESS                 0x1FFFC000U                /* Option bytes 1 registers address */
#define OB1_END_ADDRESS                   (OB1_START_ADDRESS + 16)   /* Option bytes 1 end address (48 bytes) */

//F413 only has 1 Bank so this is not needed
//#define OB2_START_ADDRESS                 0x1FFFF800U                /* Option bytes 2 registers address */
//#define OB2_END_ADDRESS                   (OB2_START_ADDRESS + 48)   /* Option bytes 2 end address (48 bytes) */

//F413 has a different starting area than G4
#define OTP_START_ADDRESS                 0x1FFF7800                   /* OTP registers address */
#define OTP_END_ADDRESS                   (OTP_START_ADDRESS + 1024)  /* OTP end address (1024 bytes) */

/*F413 has the same starting System Memory address as the G4
But it has ia different ending address.
The F413 address size is 77FF (in hex), which is 30 * 1024*/
#define ICP1_START_ADDRESS                 0x1FFF0000                  /* System memory registers address */
#define ICP1_END_ADDRESS                   (ICP1_START_ADDRESS + (30 * 1024))          /* System memory registers end address */

//F413 only has 1 memory bank so this is not needed
//#define ICP2_START_ADDRESS                 0x1FFF8000                  /* System memory registers address */
//#define ICP2_END_ADDRESS                   (ICP2_START_ADDRESS + (28 * 1024))          /* System memory registers end address */

#define OPENBL_RAM_SIZE                   0x00003000U               /* RAM used by the Open Bootloader */

#define RDP_LEVEL_0                       OB_RDP_LEVEL_0
#define RDP_LEVEL_1                       OB_RDP_LEVEL_1
#define RDP_LEVEL_2                       OB_RDP_LEVEL_2

#define AREA_ERROR                        0x0U              /* Error Address Area */
#define FLASH_AREA                        0x1U              /* Flash Address Area */
#define RAM_AREA                          0x2U              /* RAM Address area */
#define OB_AREA                           0x3U              /* Option bytes Address area */
#define OTP_AREA                          0x4U                /* OTP Address area */
#define ICP_AREA                          0x5U              /* System memory area */

#define FLASH_ERASE_ALL                   0xFFFF
#define FLASH_BANK1_ERASE                 0xFFFE
#define FLASH_BANK2_ERASE                 0xFFFD

#define INTERFACES_SUPPORTED              5U

/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */

#endif /* OPENBOOTLOADER_CONF_H */

 

3 REPLIES 3
Andrew C
Associate III

Also, I noticed that all everything references low level drivers for the comms despite the HAL being selected. The issue with this and the F4 MCUs is that if you use the HAL, there is a directive to ignore the LL driver initialization. We can just comment out the directive, but that would simply get over written if you ever redo the set up code. Was the low level driver chosen for any reason? Or can I rewrite it with HAL commands and typdefs? Or is there a way to get around this?

T_Hamdi
ST Employee

hello @Andrew C 

When adapting the Open Bootloader example from the G491RE to the STM32F413, the main changes are made in the openbootloader_conf.h file, where device-specific parameters such as memory addresses and command codes are configured.

The macros, such as FLASH_ERASE_ALL, FLASH_BANK1_ERASE, and FLASH_BANK2_ERASE, are command codes used internally by the bootloader to specify which flash erase operation to perform. These are not memory addresses but symbolic values that instruct the bootloader whether to erase the entire flash or just a specific bank. For the STM32F413, which has only one flash bank, you can remove FLASH_BANK2_ERASE.

Additionally, the low-level (LL) drivers are used in the bootloader because they are lightweight, fast, and provide precise control, which is critical for bootloader reliability and small code size. Although HAL is selected in your project, the bootloader intentionally uses LL drivers.

If you comment out the directive that disables LL initialization, it will work but will be overwritten if you regenerate the code. You can rewrite the communication code using HAL functions and typedefs, but this will require additional effort and may increase code size and complexity. 

To give better visibility on the answered topics, please click on "Accept as Solution" on the reply which solved your issue or answered your question.
Hamdi Teyeb
Andrew C
Associate III

Thanks!

Unfortunately, it is not really an easy port, at least for me. There a way too many architecture differences and the amount of edits you would need to make each time you update code from MX would be way too hard to keep track of. It just is not simply edit two files and be done.  

If anyone would be willing to collaborate and make it a public open project, I would be up for that. And I am asking to contribute as well, not just look for a completed project. I can upload what I have done this far. Unless, there is an F4 series version of this floating around somewhere. As for now, I may just have to stick to the two boot pins.