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DCMIPP silient failure

Kamurasi-Jordan-Arthur
Associate III

Hello team, 
Another day,  new same issue. :pensive_face:
I have setup the DCMIPP PIPE 1 for the stm32n6570 DK, so that it dumps frames in address 0x34200000 which maps to SRAM3 begin address I have enabled bothe the memories SRAM3 and SRAM4 but with out software erase, I used the MX tool for project generation , I goal is to mimic the Continous Mode example provided by ST, 
I have read about the appilication notes getting started with DCMIPP and the afew sections of intrest form the RM for the deve board on the topic. 

I however face the challenge  as stated in the Post Title, there Is are no interrups being called yet I set up the global intterrups for both the Pixel pipe and the CSI interfacing, "Still as shown in in the generated files" and set the clocks for the DCMIPP is set to 300Mhz and the CSI interface I had to manualy try setting up the  input clock freq for the IMX335 module to 20Mz as the MX tool does not provide for its setting, but I have this code commented out as there was not change in the behavoir 

I use the BSP bus pakage for the I2C communication, in outere to reduce the debug window, 
My Question has any one knoledge about what could be going on wrongly, or what I have not done in order to have my setup running as expected, I have checked My project for any security blocks set up, by default, but none I have seen. 

I noticed that the internal calls to the RCC may be ignored :crossed_fingers: as the IDE shows the intermost LL calls being greyed out. especially in the 

#include "stm32n6xx_ll_bus.h" file

 

 

KamurasiJordanArthur_2-1761801451579.png

 




@FBL  please help me out here. 
Find most of your querries in the attached files, 



10 REPLIES 10
Ch_JE
ST Employee

Hello,

Compared to the example provided for the IMX335 sensor, you forgot to apply downsizing (and Raw Bayer conversion for display, if needed). The purpose of downsizing is to reduce the entire image size to fit within the memory allocation you are using; otherwise, you risk overflow when using internal memories.

Could you please describe the observed behaviors DCMIPP - CSI Interrupts or errors?

VSYNC IT is expected to be observed when the sensor is correctly configured.

Best Regards,

Kamurasi-Jordan-Arthur
Associate III

Thanks you, @Ch_JE .
I actually had recreated another project out of curiosity where I forgot to apply the downsizing.
But thats not it, I figured I was not listening to the error call backs as you said. 

On a free run in dev Boot I collected the bellow errors in the order they appear.

HAL_DCMIPP_CSI_LineErrorCallback
DataLane: 1 | ErrorCode: 0x8000 | State: 2
P0: 0 | P1: 1 | P2: 0

HAL_DCMIPP_CSI_LineErrorCallback
DataLane: 2 | ErrorCode: 0x8000 | State: 2
P0: 0 | P1: 1 | P2: 0

evision ST-AE v1.0.7
evision AWB v1.0.7

DCMIPP_ErrorCallback
ErrorCode : 0x8100
Pipe1State : 0
Pipe2State : 2
Pipe3State : 0
State : 2


On debug the logs are more and the error codes are dynamic.
I like to think thats because am stepping through the code.
Bellow are the logs 

HAL_DCMIPP_CSI_LineErrorCallback
DataLane: 1 | ErrorCode: 0xC8000 | State: 4
P0: 0 | P1: 1 | P2: 0
HAL_DCMIPP_CSI_LineErrorCallback
DataLane: 2 | ErrorCode: 0xC8000 | State: 4
P0: 0 | P1: 1 | P2: 0
HAL_DCMIPP_CSI_LineErrorCallback
DataLane: 1 | ErrorCode: 0xC8000 | State: 4
P0: 0 | P1: 1 | P2: 0
........
....
..

Continous stream of that :backhand_index_pointing_up::backhand_index_pointing_up: at times,
then at other times the debug log shared above, 
then also possibly the continous stream followed by the debug log.


My question were can I read abou the Error codes 
both the comments in the HAL library and the document tha detials them.

I think this may be impotant also,

hey,
I end up here
{
/* Disable IT */
__HAL_DCMIPP_CSI_DISABLE_IT(csi_instance, DCMIPP_CSI_IT_ESOTSYNCDL0);

/* Clear Flag */
__HAL_DCMIPP_CSI_CLEAR_DPHY_FLAG(csi_instance, DCMIPP_CSI_FLAG_ESOTSYNCDL0);

/* Update error code */
hdcmipp->ErrorCode |= HAL_DCMIPP_CSI_ERROR_SOT_SYNC;

/* Change CSI state */
hdcmipp->State = HAL_DCMIPP_STATE_ERROR;

/* Error Callback */
#if (USE_HAL_DCMIPP_REGISTER_CALLBACKS == 1)
hdcmipp->LineErrorCallback(hdcmipp, DCMIPP_CSI_DATA_LANE0);
#else
HAL_DCMIPP_CSI_LineErrorCallback(hdcmipp, DCMIPP_CSI_DATA_LANE0);
#endif /* USE_HAL_DCMIPP_REGISTER_CALLBACKS */

What coud be the issue, cause I have the data lane mapping as in the Example project, "0 for 0 and 1 for 1".





Kamurasi-Jordan-Arthur
Associate III

To add,
I also see error codes 0x8400 and 0xC8000 on the HAL_DCMIPP_ErrorCallback and HAL_DCMIPP_CSI_LineErrorCallback respective,
however these dont appear in here.

/** @defgroup DCMIPP_Error_Codes DCMIPP Error Codes

* @{

*/

#define HAL_DCMIPP_ERROR_NONE (0x00000000U) /*!< No error */

#define HAL_DCMIPP_ERROR_AXI_TRANSFER (0x00000001U) /*!< IPPLUG AXI Transfer error */

#define HAL_DCMIPP_ERROR_PARALLEL_SYNC (0x00000002U) /*!< Synchronization error */

#define HAL_DCMIPP_ERROR_PIPE0_LIMIT (0x00000004U) /*!< Limit error on pipe0 */

#define HAL_DCMIPP_ERROR_PIPE0_OVR (0x00000008U) /*!< Overrun error on pipe0 */

#define HAL_DCMIPP_ERROR_PIPE1_OVR (0x00000010U) /*!< Overrun error on pipe1 */

#define HAL_DCMIPP_ERROR_PIPE2_OVR (0x00000020U) /*!< Overrun error on pipe2 */

 

#if (USE_HAL_DCMIPP_REGISTER_CALLBACKS == 1)

#define HAL_DCMIPP_ERROR_INVALID_CALLBACK ((uint32_t)0x00000040U) /*!< Invalid Callback error */

#endif /* USE_HAL_DCMIPP_REGISTER_CALLBACKS */

 

#define HAL_DCMIPP_CSI_ERROR_NONE (0x00000080U) /*!< No error */

#define HAL_DCMIPP_CSI_ERROR_SYNC (0x00000100U) /*!< Synchronization error */

#define HAL_DCMIPP_CSI_ERROR_WDG (0x00000200U) /*!< Watchdog Error */

#define HAL_DCMIPP_CSI_ERROR_SPKT (0x00000400U) /*!< Shorter Packet than expected Error */

#define HAL_DCMIPP_CSI_ERROR_DATA_ID (0x00000800U) /*!< Data ID Information Error */

#define HAL_DCMIPP_CSI_ERROR_CECC (0x00001000U) /*!< Corrected ECC Error */

#define HAL_DCMIPP_CSI_ERROR_ECC (0x00002000U) /*!< ECC Error */

#define HAL_DCMIPP_CSI_ERROR_CRC (0x00004000U) /*!< CRC Error */

#define HAL_DCMIPP_CSI_ERROR_DPHY_CTRL (0x00008000U) /*!< Error Control on data line (0 OR 1) */

#define HAL_DCMIPP_CSI_ERROR_DPHY_LP_SYNC (0x00010000U) /*!< Low-Power data transmssion Synchronisation

Error on data line (0 OR 1) */

#define HAL_DCMIPP_CSI_ERROR_DPHY_ESCAPE (0x00020000U) /*!< Escape Entry Error on data line (0 OR 1) */

#define HAL_DCMIPP_CSI_ERROR_SOT_SYNC (0x00040000U) /*!< SOT Synchronisation Error on data line(0 OR 1) */

#define HAL_DCMIPP_CSI_ERROR_SOT (0x00080000U) /*!< SOT Error on data line (0 OR 1) */

/**



Kamurasi-Jordan-Arthur
Associate III

I think now the issue is from errors happening and not being handled the Error code seems to be a bit map and not really a code

1st being 

#define HAL_DCMIPP_CSI_ERROR_DPHY_CTRL (0x00008000U) /*!< Error Control on data line (0 OR 1) */

2nd being 

#define HAL_DCMIPP_CSI_ERROR_SOT_SYNC (0x00040000U) /*!< SOT Synchronisation Error on data line(0 OR 1) */

3rd being

#define HAL_DCMIPP_CSI_ERROR_SOT (0x00080000U) /*!< SOT Error on data line (0 OR 1) */


Hence the cominations resulting to the latter Error code bit maps.

Please help understand exactly how to resolve these and what exactly they do mean.

 

Ch_JE
ST Employee

Hello,

True, not applying downsizing can lead to overrun errors, but this is not the case while you are getting errors on the CSI part, as you shared trough error codes to identify errors.

Also, regarding Pipe2, I think you meant Pipe1, since according to your files you are using only Pipe1, and Pipe2 should be reset.

Did you configured the DCMIPP GPIOs correctly?

Kamurasi-Jordan-Arthur
Associate III

Thank you so much for your reply, @Ch_JE.

:thinking_face:I am not aware of any GPIO to be configured for CSI interface except for the CAM_NRST and EN_MODULE pins, I have been under the impression the MCU's interconnect does not provide / require for this configuration for tbe manually made.

That said am glad to catch wind of this, 

Attached are is the screen shoot for my GPIO configuration.

KamurasiJordanArthur_0-1762175773778.png

 



Kamurasi-Jordan-Arthur
Associate III

Also where could I read more about this error code.

#define HAL_DCMIPP_CSI_ERROR_DPHY_CTRL (0x00008000U) /*!< Error Control on data line (0 OR 1)

That gives rise to the latter errors,

Ch_JE
ST Employee

CSI sync errors may occur if the camera starts after the CSI IP initialization. Users should be warned of errors and these errors are not blocking, you still can recieve data correctly. It is possible that the memory allocation for the entire frame is not correct. FYI I encountered this error code (0x8110) when disabling downsizing.

Kamurasi-Jordan-Arthur
Associate III

Please elaborate more on this, "It is possible that the memory allocation for the entire frame is not correct."
I have also graduated to a point where their is increment in the frame counter, but the fram is not being writen to memory,