2025-11-02 1:24 AM - last edited on 2025-11-02 6:50 AM by STOne-32
Hi everyone,
I’m trying to use the STLINK-V3MODS Bridge GPIOs (GPIO0–GPIO3) as digital outputs, but none of them show any voltage change at the pins — not even in Open-Drain mode with an external pull-up.
All API calls (InitGPIO / SetResetGPIO / ReadGPIO) report BRG_NO_ERR,
but on the hardware side, the GPIO pins stay flat at 0 V regardless of the configuration or the logical state set.
Probe: STLINK-V3MODS
OS: Windows 10/11, Visual Studio x64
DLL: STLinkUSBDriver.dll in the same folder
Using official STLINK-V3 Bridge API from ST:
:backhand_index_pointing_right: STLINK-V3 Bridge Software Package (stlink-v3-bridge-v1-2-0.zip)
(contains bridge.h, bridge.cpp, and example project apiBridgeProject)
Used InitGPIO() + SetResetGPIO()
Tried both Push-Pull and Open-Drain modes
T_VCC is connected (3.3 V detected)
Closed all COMs between runs (CloseBridge(COM_UNDEF_ALL))
Result:
Software side → success (BRG_NO_ERR, errMask = 0x00)
Hardware side → no voltage change, always 0 V
Tried with LED + 1 kΩ to 3.3 V, tried external 10 kΩ pull-up — no visible switching
It looks like the Bridge GPIOs are either disabled in firmware, or blocked by the internal level-shifters.
Are Bridge GPIOs on STLINK-V3MODS truly open-drain only (through level-shifters)?
Has anyone measured an actual sourcing HIGH at CN2 pins in Push-Pull mode?
Any official documentation (UM/AppNote) confirming this hardware behavior?
2025-11-02 2:48 AM - edited 2025-11-02 2:56 AM
Hi,
i never played with the bridge on V3mods, but from bridge.cpp :
// GPIO 0, 1, 2, 3 config, Bit1-0 mode, Bit3-2 speed, Bit5-4 pull, Bit6 output typeand xx.h :
/// GPIO port mode configuration, see also \ref LIMITATION
typedef enum {
GPIO_MODE_INPUT = 0, ///< Input mode
GPIO_MODE_OUTPUT = 1, ///< Ouptput mode
GPIO_MODE_ANALOG = 3 ///< Analog mode
}Brg_GpioModeT;
/// GPIO port output speed configuration
typedef enum {
GPIO_SPEED_LOW = 0, ///< Low speed
GPIO_SPEED_MEDIUM = 1, ///< Medium speed
GPIO_SPEED_HIGH = 2, ///< High speed
GPIO_SPEED_VERY_HIGH = 3 ///< Very high speed
}Brg_GpioSpeedT;
/// GPIO port pull-up/pull-down configuration
typedef enum {
GPIO_NO_PULL = 0, ///< No pull-up, no pull-down
GPIO_PULL_UP = 1, ///< Pull-up
GPIO_PULL_DOWN = 2 ///< Pull-down
}Brg_GpioPullT;
/// GPIO port output type configuration
typedef enum {
GPIO_OUTPUT_PUSHPULL = 0, ///< Output push-pull
GPIO_OUTPUT_OPENDRAIN = 1 ///< Output open-drain
}Brg_GpioOutputT;
/// GPIO init configuration, see also \ref LIMITATION
typedef struct {
Brg_GpioModeT Mode; ///< GPIO port mode
Brg_GpioSpeedT Speed; ///< GPIO port output speed
Brg_GpioPullT Pull; ///< GPIO port pull-up/pull-down
Brg_GpioOutputT OutputType; ///< GPIO port output type
}Brg_GpioConfT;
/// GPIO init parameters for Brg::InitGPIO(), see also \ref LIMITATION
typedef struct {
uint8_t GpioMask; ///< GPIO(s) to be configured (one or several value of #Brg_GpioMaskT)
uint8_t ConfigNb; ///< Number of #Brg_GpioConfT pointed by pGpioConf:\n
///< must be #BRG_GPIO_MAX_NB or 1 (if 1 pGpioConf[0] used for all gpios)
Brg_GpioConfT *pGpioConf; ///< Table of ConfigNb init configuration.\n
///< If #BRG_GPIO_MAX_NB, pGpioConf[0] for GPIO_0, .., pGpioConf[3] for GPIO_3. \n
///< GPIO(s) that are not present in GpioMask are not configured.
} Brg_GpioInitT;
..so pins can be set to in, out, pull.. like any standard i/o pin, depending on : const Brg_GpioInitT *pInitParams .
What you set here ?