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Nucleo-H753ZI SPI Slave DMA continuously outputs 0xFF 0xFF 0xFF 0xFF; cannot transmit data
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2025-12-11 7:10 AM - last edited on 2025-12-11 7:42 AM by Andrew Neil
Hello ST Community,
am working with a Nucleo-H753ZI board where the STM32H753ZI is configured as an SPI1 slave, and the SPI master is a TI AM64x R5F core.
The goal is for the STM32 to continuously transmit 4-byte frames over SPI (using DMA) whenever the master clocks the bus.
However, the problem is:The master is receives only FF FF
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file : main.c
* @brief : Main program body
******************************************************************************
* @attention
*
* Copyright (c) 2025 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "main.h"
#include "string.h"
#include "stdio.h"
#include "stdarg.h"
#include "math.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN PTD */
/* USER CODE END PTD */
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */
/* USER CODE END PD */
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN PM */
/* USER CODE END PM */
/* Private variables ---------------------------------------------------------*/
ADC_HandleTypeDef hadc3;
DMA_HandleTypeDef hdma_adc3;
SPI_HandleTypeDef hspi1;
DMA_HandleTypeDef hdma_spi1_tx;
TIM_HandleTypeDef htim6;
UART_HandleTypeDef huart3;
/* USER CODE BEGIN PV */
#define UART_HANDLE huart3
#define SPI_HANDLE hspi1
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
void SystemClock_Config(void);
void PeriphCommonClock_Config(void);
static void MPU_Config(void);
static void MX_GPIO_Init(void);
static void MX_BDMA_Init(void);
static void MX_DMA_Init(void);
static void MX_TIM6_Init(void);
static void MX_USART3_UART_Init(void);
static void MX_ADC3_Init(void);
static void MX_SPI1_Init(void);
/* USER CODE BEGIN PFP */
static inline uint32_t raw_to_mV(uint32_t raw16);
static void Build_SPI_Sample(uint8_t out[4], uint16_t adc_value, uint16_t sample_index);
static void Process_Block(const uint16_t *p, uint32_t N);
/* callbacks */
void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef *hadc);
void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef *hadc);
void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi);
/* UART helpers */
static void uart_printf(const char *fmt, ...);
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
/* ADC + SPI working buffers */
/* ADC DMA buffer in RAM_D3 */
__attribute__((section(".RAM_D3")))
__attribute__((aligned(32)))
uint16_t adcBuf[480]; /* 480 samples -> two half-buffers of 240 */
static uint16_t shadow_half[240];
static volatile uint8_t shadow_valid = 0;
/* SPI slave TX state + double buffer (4 bytes per sample, ping-pong) */
__attribute__((section(".RAM_D3")))
__attribute__((aligned(32)))
uint8_t spi_tx[2][4];
static volatile uint8_t spi_busy = 0; /* 1 while a DMA TX is running */
volatile uint8_t spi_tx_free = 0; /* index (0/1) FREE to rebuild next frame */
volatile uint8_t spi_tx_in_use= 0; /* index (0/1) currently armed for TX */
static uint16_t g_sample_index = 0; /* rolls 0..65535, placed in frame [2..3] */
volatile uint8_t pending_half = 0; /* 0 -> [0..239], 1 -> [240..479] */
static volatile uint8_t last_half = 0; /* 0 = first half, 1 = second */
/* Statistics / thresholds */
#define STAT_WIN_N 240U /* half-buffer = 240 samples */
#define HALF_COUNT STAT_WIN_N
/* Board supply in mV (measured VDDA ) */
#ifndef VREF_MV
#define VREF_MV 3260UL
#endif
/* AC/DC decision thresholds (with hysteresis), in mV */
#define AC_P2P_HI_MV 150U /* enter AC if >= 150 mV p-p and >= 100 mVrms */
#define AC_RMS_HI_MV 100U
#define AC_P2P_LO_MV 75U /* return to DC if <= 75 mV p-p and <= 70 mVrms */
#define AC_RMS_LO_MV 70U
/* Running stats (RAW units). Only updated in thread context. */
volatile uint32_t win_mean_raw = 0;
volatile uint32_t win_rms_raw = 0;
volatile uint16_t win_min_raw = 0xFFFF;
volatile uint16_t win_max_raw = 0x0000;
/* Same stats converted to millivolts (for printing/thresholds) */
volatile uint32_t win_mean_mv = 0;
volatile uint32_t win_rms_mv = 0;
volatile uint32_t win_min_mv = 0;
volatile uint32_t win_max_mv = 0;
/* 0 = DC, 1 = AC (decided with hysteresis) */
volatile uint8_t signal_is_ac = 0;
/* flag set by ADC DMA callbacks, consumed in main loop */
volatile uint8_t stats_pending = 0;
/* RAW -> mV helper */
static inline uint32_t raw_to_mV(uint32_t raw16)
{
return (uint32_t)((uint64_t)raw16 * (uint64_t)VREF_MV / 65535ULL);
}
/* UART DMA ring buffer (printf) */
/* Asynchronous UART TX ring + state for DMA-driven uart_printf() */
#define TXBUF_SIZE 1024
static volatile uint16_t tx_head = 0; /* next write index */
static volatile uint16_t tx_tail = 0; /* next DMA start */
static volatile uint8_t tx_dma_busy = 0;
/* USER CODE END 0 */
/**
* @brief The application entry point.
* @retval int
*/
int main(void)
{
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/* MPU Configuration--------------------------------------------------------*/
MPU_Config();
/* MCU Configuration--------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init();
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* Configure the system clock */
SystemClock_Config();
/* Configure the peripherals common clocks */
PeriphCommonClock_Config();
/* USER CODE BEGIN SysInit */
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_GPIO_Init();
MX_BDMA_Init();
MX_DMA_Init();
MX_TIM6_Init();
MX_USART3_UART_Init();
MX_ADC3_Init();
MX_SPI1_Init();
/* USER CODE BEGIN 2 */
/* USER CODE BEGIN 2 */
HAL_Delay(500);
/* 1) Start ADC3 + DMA (480 samples total => two halves of 240) */
if (HAL_ADC_Start_DMA(&hadc3, (uint32_t*)adcBuf, 480U) != HAL_OK) {
uart_printf("ADC DMA START FAILED\r\n");
}
/* 2) Prime SPI ping-pong buffers (4 bytes each) */
uint16_t seed = shadow_valid ? shadow_half[STAT_WIN_N - 1] : 0;
Build_SPI_Sample(spi_tx[0], seed, g_sample_index++);
Build_SPI_Sample(spi_tx[1], seed, g_sample_index++);
/* Mark one buffer FREE and one IN USE before starting DMA */
spi_tx_free = 1; /* buffer 1 can be rebuilt next */
spi_tx_in_use = 0; /* buffer 0 is armed for TX */
spi_busy = 0;
/* 3) Start SPI1 slave TX DMA (master must clock SCK/NSS) */
if (HAL_SPI_Transmit_DMA(&SPI_HANDLE, spi_tx[spi_tx_in_use], sizeof(spi_tx[0])) == HAL_OK) {
spi_busy = 1;
} else {
uart_printf("SPI DMA START FAILED\r\n");
spi_busy = 0; /* keep running in UART-only mode */
}
/* 4) Start TIM6 – triggers ADC conversions at the sample rate */
if (HAL_TIM_Base_Start(&htim6) != HAL_OK) {
uart_printf("TIM6 START FAILED\r\n");
}
/* 5) Banner */
uart_printf("System ready - ADC+DMA active; SPI slave primed; UART debug enabled\r\n");
/* USER CODE END 2 */
/* Infinite loop */
/* USER CODE BEGIN WHILE */
/* Infinite loop */
/* Infinite loop */
while (1)
{
/* 1) If a fresh 240-sample block was frozen, process it here */
if (stats_pending) {
__disable_irq();
uint8_t half = pending_half;
stats_pending = 0;
__enable_irq();
const uint16_t *src=&adcBuf[ half ? 240 : 0 ];
memcpy(shadow_half, src, STAT_WIN_N * sizeof(uint16_t));
Process_Block(shadow_half, STAT_WIN_N);
}
/* 2) Print at most every 500 ms over UART */
static uint32_t last_print_ms = 0;
uint32_t now = HAL_GetTick();
if (now - last_print_ms >= 500) {
last_print_ms = now;
uint32_t mean_raw, mean_mv, rms_mv, min_mv, max_mv;
uint8_t is_ac;
__disable_irq();
mean_raw = win_mean_raw;
mean_mv = win_mean_mv;
rms_mv = win_rms_mv;
min_mv = win_min_mv;
max_mv = win_max_mv;
is_ac = signal_is_ac;
__enable_irq();
uint32_t vpp_mv = (max_mv >= min_mv) ? (max_mv - min_mv) : 0U;
if (is_ac) {
uart_printf("Mode: AC raw=%lu Vrms=%lumV Vpp=%lumV\r\n",
(unsigned long)mean_raw,
(unsigned long)rms_mv,
(unsigned long)vpp_mv);
} else {
uart_printf("Mode: DC raw=%lu Vmean=%lu.%03luV\r\n",
(unsigned long)mean_raw,
(unsigned long)(mean_mv / 1000UL),
(unsigned long)(mean_mv % 1000UL));
}
}
/* 3) Simple SPI slave TX: send one 4-byte frame every time TI clocks us */
{
uint8_t frame[4];
/* Use latest mean_raw as the sample (cast to 16-bit).
You can change this to adcBuf[0] or any other sample if you want. */
uint16_t sample = (uint16_t)win_mean_raw;
Build_SPI_Sample(frame, sample, g_sample_index++);
/* This blocks until the TI MCSPI master pulls NSS low and clocks 4 bytes */
if (HAL_SPI_Transmit(&SPI_HANDLE, frame, sizeof(frame), HAL_MAX_DELAY) != HAL_OK)
{
uart_printf("SPI TX error, err=0x%lx\r\n",
(unsigned long)HAL_SPI_GetError(&SPI_HANDLE));
}
}
}
/* USER CODE END WHILE */
/* USER CODE BEGIN 3 */
/* USER CODE END 3 */
}
/**
* @brief System Clock Configuration
* @retval None
*/
void SystemClock_Config(void)
{
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
/** Supply configuration update enable
*/
HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
/** Configure the main internal regulator output voltage
*/
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE3);
while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
RCC_OscInitStruct.HSIState = RCC_HSI_DIV1;
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
RCC_OscInitStruct.PLL.PLLM = 8;
RCC_OscInitStruct.PLL.PLLN = 48;
RCC_OscInitStruct.PLL.PLLP = 4;
RCC_OscInitStruct.PLL.PLLQ = 2;
RCC_OscInitStruct.PLL.PLLR = 2;
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_3;
RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
RCC_OscInitStruct.PLL.PLLFRACN = 0;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
{
Error_Handler();
}
/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2
|RCC_CLOCKTYPE_D3PCLK1|RCC_CLOCKTYPE_D1PCLK1;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV1;
RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV4;
RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV1;
RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV1;
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
{
Error_Handler();
}
}
/**
* @brief Peripherals Common Clock Configuration
* @retval None
*/
void PeriphCommonClock_Config(void)
{
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
/** Initializes the peripherals clock
*/
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_ADC|RCC_PERIPHCLK_SPI1;
PeriphClkInitStruct.PLL2.PLL2M = 4;
PeriphClkInitStruct.PLL2.PLL2N = 10;
PeriphClkInitStruct.PLL2.PLL2P = 2;
PeriphClkInitStruct.PLL2.PLL2Q = 2;
PeriphClkInitStruct.PLL2.PLL2R = 2;
PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2VCIRANGE_3;
PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2VCOMEDIUM;
PeriphClkInitStruct.PLL2.PLL2FRACN = 0;
PeriphClkInitStruct.Spi123ClockSelection = RCC_SPI123CLKSOURCE_PLL2;
PeriphClkInitStruct.AdcClockSelection = RCC_ADCCLKSOURCE_PLL2;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
{
Error_Handler();
}
}
/**
* @brief ADC3 Initialization Function
* None
* @retval None
*/
static void MX_ADC3_Init(void)
{
/* USER CODE BEGIN ADC3_Init 0 */
/* USER CODE END ADC3_Init 0 */
ADC_ChannelConfTypeDef sConfig = {0};
/* USER CODE BEGIN ADC3_Init 1 */
/* USER CODE END ADC3_Init 1 */
/** Common config
*/
hadc3.Instance = ADC3;
hadc3.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV2;
hadc3.Init.Resolution = ADC_RESOLUTION_16B;
hadc3.Init.ScanConvMode = ADC_SCAN_DISABLE;
hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
hadc3.Init.LowPowerAutoWait = DISABLE;
hadc3.Init.ContinuousConvMode = DISABLE;
hadc3.Init.NbrOfConversion = 1;
hadc3.Init.DiscontinuousConvMode = DISABLE;
hadc3.Init.ExternalTrigConv = ADC_EXTERNALTRIG_T6_TRGO;
hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_RISING;
hadc3.Init.ConversionDataManagement = ADC_CONVERSIONDATA_DMA_CIRCULAR;
hadc3.Init.Overrun = ADC_OVR_DATA_PRESERVED;
hadc3.Init.LeftBitShift = ADC_LEFTBITSHIFT_NONE;
hadc3.Init.OversamplingMode = DISABLE;
hadc3.Init.Oversampling.Ratio = 1;
if (HAL_ADC_Init(&hadc3) != HAL_OK)
{
Error_Handler();
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_9;
sConfig.Rank = ADC_REGULAR_RANK_1;
sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5;
sConfig.SingleDiff = ADC_SINGLE_ENDED;
sConfig.OffsetNumber = ADC_OFFSET_NONE;
sConfig.Offset = 0;
sConfig.OffsetSignedSaturation = DISABLE;
if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN ADC3_Init 2 */
/* USER CODE END ADC3_Init 2 */
}
/**
* @brief SPI1 Initialization Function
* None
* @retval None
*/
static void MX_SPI1_Init(void)
{
/* USER CODE BEGIN SPI1_Init 0 */
/* USER CODE END SPI1_Init 0 */
/* USER CODE BEGIN SPI1_Init 1 */
/* USER CODE END SPI1_Init 1 */
/* SPI1 parameter configuration*/
hspi1.Instance = SPI1;
hspi1.Init.Mode = SPI_MODE_SLAVE;
hspi1.Init.Direction = SPI_DIRECTION_2LINES;
hspi1.Init.DataSize = SPI_DATASIZE_8BIT;
hspi1.Init.CLKPolarity = SPI_POLARITY_LOW;
hspi1.Init.CLKPhase = SPI_PHASE_1EDGE;
hspi1.Init.NSS = SPI_NSS_HARD_INPUT;
hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
hspi1.Init.CRCPolynomial = 0x0;
hspi1.Init.NSSPMode = SPI_NSS_PULSE_DISABLE;
hspi1.Init.NSSPolarity = SPI_NSS_POLARITY_LOW;
hspi1.Init.FifoThreshold = SPI_FIFO_THRESHOLD_01DATA;
hspi1.Init.TxCRCInitializationPattern = SPI_CRC_INITIALIZATION_ALL_ZERO_PATTERN;
hspi1.Init.RxCRCInitializationPattern = SPI_CRC_INITIALIZATION_ALL_ZERO_PATTERN;
hspi1.Init.MasterSSIdleness = SPI_MASTER_SS_IDLENESS_00CYCLE;
hspi1.Init.MasterInterDataIdleness = SPI_MASTER_INTERDATA_IDLENESS_00CYCLE;
hspi1.Init.MasterReceiverAutoSusp = SPI_MASTER_RX_AUTOSUSP_DISABLE;
hspi1.Init.MasterKeepIOState = SPI_MASTER_KEEP_IO_STATE_DISABLE;
hspi1.Init.IOSwap = SPI_IO_SWAP_DISABLE;
if (HAL_SPI_Init(&hspi1) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN SPI1_Init 2 */
__HAL_SPI_DISABLE(&hspi1);
MODIFY_REG(hspi1.Instance->CFG1, SPI_CFG1_FTHLV, SPI_FIFO_THRESHOLD_04DATA);
__HAL_SPI_ENABLE(&hspi1);
/* Enable SPI1 global interrupt so ErrorCallback can run */
HAL_NVIC_SetPriority(SPI1_IRQn, 1, 0);
HAL_NVIC_EnableIRQ(SPI1_IRQn);
/* USER CODE END SPI1_Init 2 */
}
/**
* @brief TIM6 Initialization Function
* None
* @retval None
*/
static void MX_TIM6_Init(void)
{
/* USER CODE BEGIN TIM6_Init 0 */
/* USER CODE END TIM6_Init 0 */
TIM_MasterConfigTypeDef sMasterConfig = {0};
/* USER CODE BEGIN TIM6_Init 1 */
/* USER CODE END TIM6_Init 1 */
htim6.Instance = TIM6;
htim6.Init.Prescaler = 99;
htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
htim6.Init.Period = 199;
htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
if (HAL_TIM_Base_Init(&htim6) != HAL_OK)
{
Error_Handler();
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_UPDATE;
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN TIM6_Init 2 */
/* USER CODE END TIM6_Init 2 */
}
/**
* @brief USART3 Initialization Function
* None
* @retval None
*/
static void MX_USART3_UART_Init(void)
{
/* USER CODE BEGIN USART3_Init 0 */
/* USER CODE END USART3_Init 0 */
/* USER CODE BEGIN USART3_Init 1 */
/* USER CODE END USART3_Init 1 */
huart3.Instance = USART3;
huart3.Init.BaudRate = 115200;
huart3.Init.WordLength = UART_WORDLENGTH_8B;
huart3.Init.StopBits = UART_STOPBITS_1;
huart3.Init.Parity = UART_PARITY_NONE;
huart3.Init.Mode = UART_MODE_TX_RX;
huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE;
huart3.Init.OverSampling = UART_OVERSAMPLING_16;
huart3.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
huart3.Init.ClockPrescaler = UART_PRESCALER_DIV1;
huart3.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
if (HAL_UART_Init(&huart3) != HAL_OK)
{
Error_Handler();
}
if (HAL_UARTEx_SetTxFifoThreshold(&huart3, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
{
Error_Handler();
}
if (HAL_UARTEx_SetRxFifoThreshold(&huart3, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
{
Error_Handler();
}
if (HAL_UARTEx_DisableFifoMode(&huart3) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN USART3_Init 2 */
/* USER CODE END USART3_Init 2 */
}
/**
* Enable DMA controller clock
*/
static void MX_BDMA_Init(void)
{
/* DMA controller clock enable */
__HAL_RCC_BDMA_CLK_ENABLE();
/* DMA interrupt init */
/* BDMA_Channel0_IRQn interrupt configuration */
HAL_NVIC_SetPriority(BDMA_Channel0_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(BDMA_Channel0_IRQn);
}
/**
* Enable DMA controller clock
*/
static void MX_DMA_Init(void)
{
/* DMA controller clock enable */
__HAL_RCC_DMA1_CLK_ENABLE();
/* DMA interrupt init */
/* DMA1_Stream0_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Stream0_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(DMA1_Stream0_IRQn);
}
/**
* @brief GPIO Initialization Function
* None
* @retval None
*/
static void MX_GPIO_Init(void)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
/* USER CODE BEGIN MX_GPIO_Init_1 */
/* USER CODE END MX_GPIO_Init_1 */
/* GPIO Ports Clock Enable */
__HAL_RCC_GPIOF_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE();
__HAL_RCC_GPIOB_CLK_ENABLE();
__HAL_RCC_GPIOD_CLK_ENABLE();
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOB, GPIO_PIN_12, GPIO_PIN_RESET);
/*Configure GPIO pin : PB12 */
GPIO_InitStruct.Pin = GPIO_PIN_12;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
/* USER CODE BEGIN MX_GPIO_Init_2 */
/* Configure SPI1 pins for very high speed*/
GPIO_InitStruct.Pin = GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7; // NSS, SCK, MISO, MOSI
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF5_SPI1;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/* USER CODE END MX_GPIO_Init_2 */
}
/* USER CODE BEGIN 4 */
/* printf over UART (blocking, thread context only) */
static void uart_printf(const char *fmt, ...)
{
char buf[256];
va_list ap;
va_start(ap, fmt);
int n = vsnprintf(buf, sizeof(buf), fmt, ap);
va_end(ap);
if (n <= 0) return;
/* Send with LF->CRLF conversion so terminal always sees CR+LF */
for (int i = 0; i < n; ++i) {
uint8_t c = (uint8_t)buf[i];
if (c == '\n') {
uint8_t cr = '\r';
HAL_UART_Transmit(&UART_HANDLE, &cr, 1, HAL_MAX_DELAY);
}
HAL_UART_Transmit(&UART_HANDLE, &c, 1, HAL_MAX_DELAY);
}
}
/* 4-byte SPI sample builder: [ADC_L, ADC_H, IDX_L, IDX_H] */
static void Build_SPI_Sample(uint8_t out[4], uint16_t adc_value, uint16_t sample_index)
{
out[0] = (uint8_t)(adc_value & 0xFFu);
out[1] = (uint8_t)((adc_value >> 8) & 0xFFu);
out[2] = (uint8_t)(sample_index & 0xFFu);
out[3] = (uint8_t)((sample_index >> 8) & 0xFFu);
}
/* Status-byte helper (bit0 valid, bit1 AC/DC, bit2 under, bit3 over) */
static inline uint8_t build_status_byte(void)
{
uint8_t s = 0;
s |= 1u; /* bit0 = data valid / in-sync */
s |= (signal_is_ac ? 1u : 0u) << 1; /* bit1 = 1->AC, 0->DC */
if (win_min_raw < 10) s |= (1u << 2);/* bit2 = underrange */
if (win_max_raw > 65525) s |= (1u << 3);/* bit3 = overrange */
return s;
}
/* Compute mean/rms/min/max for a 240-sample block + AC/DC state */
static void Process_Block(const uint16_t *p, uint32_t N)
{
uint64_t acc = 0;
uint16_t mn = 0xFFFFu, mx = 0x0000u;
for (uint32_t i = 0; i < N; i++) {
uint16_t s = p[i];
acc += s;
if (s < mn) mn = s;
if (s > mx) mx = s;
}
uint32_t mean_raw = (uint32_t)(acc / N);
long long acc_sq = 0;
for (uint32_t i = 0; i < N; i++) {
int32_t d = (int32_t)p[i] - (int32_t)mean_raw;
acc_sq += (long long)d * (long long)d;
}
uint32_t rms_raw = (uint32_t)(sqrt((double)acc_sq / (double)N) + 0.5);
/* publish RAW stats */
win_mean_raw = mean_raw;
win_rms_raw = rms_raw;
win_min_raw = mn;
win_max_raw = mx;
/* convert to mV for prints / thresholds */
win_mean_mv = raw_to_mV(mean_raw);
win_rms_mv = raw_to_mV(rms_raw);
win_min_mv = raw_to_mV(mn);
win_max_mv = raw_to_mV(mx);
/* hysteresis decision */
static uint8_t ac_state = 0; /* 0=DC, 1=AC (persistent) */
uint32_t p2p_mv = (win_max_mv >= win_min_mv) ? (win_max_mv - win_min_mv) : 0U;
if (!ac_state) {
if ((p2p_mv >= AC_P2P_HI_MV) && (win_rms_mv >= AC_RMS_HI_MV)) ac_state = 1;
} else {
if ((p2p_mv <= AC_P2P_LO_MV) && (win_rms_mv <= AC_RMS_LO_MV)) ac_state = 0;
}
signal_is_ac = ac_state;
}
/* ADC DMA CALLBACKS */
void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef *hadc)
{
if (hadc->Instance != ADC3) return;
pending_half = 0; /* first half [0..239] */
stats_pending = 1; /* tell main loop to process this half */
shadow_valid = 1; /* we have valid data now */
}
void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef *hadc)
{
if (hadc->Instance != ADC3) return;
pending_half = 1; /* second half [240..479] */
stats_pending = 1; /* tell main loop to process this half */
shadow_valid = 1;
}
/* NOTE:
* No SPI DMA helpers, no HAL_SPI_TxCpltCallback, and no HAL_SPI_ErrorCallback
* anymore – we are using blocking HAL_SPI_Transmit() from the main loop instead.
*/
/* USER CODE END 4 */
/* MPU Configuration */
void MPU_Config(void)
{
MPU_Region_InitTypeDef MPU_InitStruct = {0};
/* Disables the MPU */
HAL_MPU_Disable();
/** Initializes and configures the Region and the memory to be protected
*/
MPU_InitStruct.Enable = MPU_REGION_ENABLE;
MPU_InitStruct.Number = MPU_REGION_NUMBER0;
MPU_InitStruct.BaseAddress = 0x0;
MPU_InitStruct.Size = MPU_REGION_SIZE_4GB;
MPU_InitStruct.SubRegionDisable = 0x87;
MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;
MPU_InitStruct.AccessPermission = MPU_REGION_NO_ACCESS;
MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_DISABLE;
MPU_InitStruct.IsShareable = MPU_ACCESS_SHAREABLE;
MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE;
MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE;
HAL_MPU_ConfigRegion(&MPU_InitStruct);
/* Enables the MPU */
HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT);
}
/**
* @brief This function is executed in case of error occurrence.
* @retval None
*/
void Error_Handler(void)
{
/* USER CODE BEGIN Error_Handler_Debug */
/* User can add his own implementation to report the HAL error return state */
__disable_irq();
while (1)
{
}
/* USER CODE END Error_Handler_Debug */
}
#ifdef USE_FULL_ASSERT
/**
* @brief Reports the name of the source file and the source line number
* where the assert_param error has occurred.
* file: pointer to the source file name
* line: assert_param error line source number
* @retval None
*/
void assert_failed(uint8_t *file, uint32_t line)
{
/* USER CODE BEGIN 6 */
/* User can add his own implementation to report the file name and line number,
ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
/* USER CODE END 6 */
}
#endif /* USE_FULL_ASSERT */The SPI pins are configured as follows: PB4 = NSS, PA5 = SCK, PA6 = MISO, PB5 = MOSI. SPI mode is CPOL = 0, CPHA = 1, 8-bit data size, FIFO threshold set to 4 bytes, and DMA is enabled for SPI1_TX. The program runs, the ADC works, callbacks fire, and DMA TX is continuously restarted, but the external master always receives 0xFF 0xFF 0xFF 0xFF regardless of the actual ADC data. I need help understanding why SPI slave DMA never outputs my prepared 4-byte buffer on MISO even though DMA callbacks indicate transfers are happening. Why does SPI slave output remains 0xFF not ADC values?
Any guidance or corrections to my configuration/code would be greatly appreciated.
Thank you.
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STM32H7 series
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