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ST25R3911B: Lower the output power

Associate II


I am working with an NFC reader with an ST25R3911B chip. The problem I am experiencing is the output power. The power emitted by the antenna is too high; therefore, my task is to reduce the transmitted power.
To do this I have relied on reading your application notes. From this extensive reading I realized that there are many possible solutions to reduce the output power, including:
- reducing the supply voltage of the chip;
- using a single-ended antenna instead of differential antenna configuration;
- designing an antenna with higher impedance;
- change the antenna driver output resistance;
- change the chip internal regulated voltage.
Unfortunately, I am working with an already defined differential architecture that excludes the first three options (because would be optimal to not change the current HW structure of the PCB). This allows me to hope for only the last two.
First of all I am assuming that these last two options do not require a change in the PCB hardware, if this is true could you give me a hand in figuring out how to implement these last two options at the firmware level (register addresses to overwrite and how)?
Thank you for your time.



Associate II

Hi Travis,
unfortunately the latest RED 2014/53/EU related tests performed on this configuration have not been passed. So my task, as I write in the first posts of the topic, is to lower the power output from the chip and reduce the amplitude associated with harmonics of higher than first order.
I realize that the setup for measurement is not optimal but I need it to have an estimate, albeit a rough one but still an estimate, of the frequency content of the field produced. Unfortunately, following the setup described in Chapter 5.3 of ISO10373-6 would be too great a complication for this stage of development. This is the reason why I was asking for your help. In particular, I ask the question again, do you see any particular discrepancies in the chip configuration? Could these abnormal behaviors (second harmonic so high) be attributable to use of particular types of components? I thank you in advance for your time and if I can be of any help in providing any new information I remain at your disposal.



Hello Luigi,


could you share the part of the layout related to the NFC IC? Especially related to VSP_RF and VDD decoupling and supply filtering.

Another question is, how the device performs without the tag being placed on the antenna. Do you still see the same spurs. There are certain tags where the limiter inside can cause such emissions if the voltage on the tag antenna is too high. If it is not possible to change the distance in the final application, the antenna geometry could be changed to reduce the coupling.


BR Travis