2025-05-21 3:20 AM
Hello,
We are currently developing a couple of devices with USB-C DAM support and have chosen to use the STUSB4500 as the power sink on the device side.
We would like to understand whether the following behavior is expected, and if there are any options for managing or configuring it:
Using a custom debug board, we pull both CC pins high and then apply 5V power to the CC bus. Once this setup is in place, PD negotiation begins. However, we consistently observe a sequence of three Hard Resets initiated by the STUSB4500. This would not be a concern on its own, but during each Hard Reset, the STUSB4500 also toggles the nVBUSENSNK pin, which in turn enables downstream power for approximately half a second.
We’ve attached a screenshot from a CC protocol analyzer illustrating this behavior.
Could you please clarify:
Is this behavior expected from the STUSB4500?
Is there a way to configure the delay on the nVBUSENSNK signal?
Can the number of Hard Reset attempts be changed?
Or, does this indicate a potential hardware issue in our design?
We appreciate your guidance and support.
Best regards,
Andrius
CC pin analyzer