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STM32 LTDC with LVGL

b1aze
Associate III

Hi all i have been working with LTDC module inside stm32 MCUs to drive an external parallel 24 bit RGB display , 

i integrated an LVGL UI inside this project  but my output is kinda look like this 

b1aze_0-1764830747445.png

 i dont know what is causing it , . display is running at 11 mhz.

i am using nucleo H7A3ZI-q dev board with cortex M7

i asked in lvgl no response from them :sad_but_relieved_face: any help here 

i also tried to fill iw with two colors 50-by 50 theni got this 

b1aze_0-1764836037273.png

  so i think that problem is not with LVGL .

 

<<<<<<<<<<<<update>>>>>>>>>>>>>>>>>>>

i was able to get this output bu changing the startaddress  from 

b1aze_1-1764839746767.png

if i put 0x24000000 i get the misaligned one . but now the issue is if i integrate LVGL now while the startaddress is (uint32_t)framebuffer , i get nothing in display , if i chnage that to 0x24000000 i get the misaligned output of LVGL 

 

b1aze_0-1764839730350.png

 

 

 

7 REPLIES 7
KDJEM.1
ST Employee

Hello @b1aze ;

 

-> now the issue is if i integrate LVGL.

LVGL is not an ST implementation. I recommend you to contact the LVGL on their forums. 

Have you tried asking at https://forum.lvgl.io/ ?

 

Thank you.

Kaouthar

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.

yeah it was a framebuffer glitch , I fixed it myself. can you tell me how to increase the speed so it can copy to memory faster than usual

i tried changing the sysclock,AHB buses from 64 to 100 is that ok ? 

KDJEM.1
ST Employee

Hello @b1aze ;

 

It is recommended to use the highest system clock to get the best graphic performances.

The pixel clock is a key parameter for checking display size compatibility with a specific hardware configuration.
The computed pixel clock need to respect the display specifications.
The pixel clock for a specific refresh rate is calculated with the following formula:
LCD_CLK (MHz) = total screen size x refresh rate
Where total screen size = total width x total height

For mor information I recommend you to look at Introduction to LCD-TFT display controller (LTDC) on STM32 MCUs - Application note precisely section 5.2.2 Checking display compatibility considering the memory bandwidth requirements.

 

Thank you.

Kaouthar

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.

LCD clock is configured to support the LCD I have , what i am talking about is the system clock , AHB bus clock, peripherals clock and all that, and does the increase in these clock increase power consumption . 


@b1aze wrote:

 does the increase in these clock increase power consumption . 


Please don't ask many questions in the same thread. Please keep one question per thread.

Thank you for your understanding.

To give better visibility on the answered topics, please click on "Accept as Solution" on the reply which solved your issue or answered your question.

If you don't know the answer please let me know :smiling_face_with_smiling_eyes: .  you dont have to say it like this ,just say that here why you cant answer my question ;).  ill find somebody else who can slove my issues :D 

Thank you for your understanding


@b1aze wrote:

If you don't know the answer please let me know :smiling_face_with_smiling_eyes: .  you dont have to say it like this ,just say that here why you cant answer my question ;). 


This is the guideline here. So please follow it. As a moderator,  I'm not here to answer the question I'm here to recall the guidelines.

Have a nice day!

To give better visibility on the answered topics, please click on "Accept as Solution" on the reply which solved your issue or answered your question.