2025-05-18 4:02 AM - edited 2025-05-19 9:12 AM
Hi everyone, i am using the TSZ121 as a high to low impedance match stage in order to drive a differential MCU (MSP430i20x). The input stage seen below comprises several mosfet optocouplers (see C1-C5) that shape the input attenuation. C1-C5 is simply their cut-off state inherent capacitance. R6 is also the output of a mosfet optocoupler acting as shorted/non-shorted input for ADC offset calibration.
The image seen below depicts DC simulation and everything seems as expected.
However, on my pcb, i am measuring around 20mV between OUTB & GND and 70mV between OUTA & GND, provided that P1 trimmer is almost exactly centered (adjusted so that center tap is in the middle of adjustment range).
The PCB was re-flowed very carefully with a stencil and everything seems near-perfect.
R5 & R7 are 0Ω.
The pcb was cleaned with an ultrasonic cleaner which as proven after quite a few iterations at work is a very good solution for wiping out leakage between high impedance nodes. Looking at the PCB with a 100 euro Aliexpress microscope does not reveal any residue at all.
I have struggled with this issue for a few days but could not find the culprit.
I have measured between either INA/INB and GND and the resistance is nearly 12.5MΩ as expected. This proves that there is no leakage between either the TSZ121 non-inverting inputs and GND and that the potentiometer P1 is almost perfectly centered.
R1 and R2 either consist of 5x2MΩ 0.1% thin film resistors.
Can anyone guess what i am missing here?
DC simulation in Tina
Thanks for your time.
Manos
Solved! Go to Solution.
2025-06-08 1:15 AM
Hi,
I am dumping the TSZ121 and driving the MSP430i2xxx input directly.
The only compromise here is lower input impedance for certain conditions.
Regards
Manos
2025-05-21 12:38 PM
Thoughts on your schematics:
Regards
/Peter
2025-05-22 9:18 AM
Dear Peter,
Thank you very much for your comments.
After having a look at the app. note it was obvious that i did not know that there are spikes at the inputs although i did know very well that this opamp was a chopper amplifier.
However i do not see how this is related to the issue i am facing.
The difference i am measuring between the two stages' outputs is precisely what i would expect which is exactly 50mV with a 250mV input.
What i find extremely weird is that both inputs are offset by a positive value of 45mV.
If i subtract 45mV from the 70mV i get 25mV which should be the case at the output of U2.
If i subtract 45mV from the 20mV i get -25mV which should be the case at the output of U1.
I heard you talking about offset and i am wondering if this offset is related to the fact that i do not have any caps between the non-inverting inputs and GND.
*There are decoupling caps between both pos. & neg. rails and GND. I just did not use them in the simulation.
I will keep digging.
Thank you so much for your time.
Regards
Manos
2025-05-27 9:19 AM - edited 2025-05-27 9:19 AM
Hi Peter,
After connecting 15pF between each non-inverting input and GND i measured the outputs and both were exactly at 40mV offset. Before measuring the outputs i drove one of the opto-couplers i use for shorting the non-inverting inputs in order to perform ADC offset calibration. With the opto-coupler driven to saturation or not the TSZ121 are still offset.
R13,14 are 0R.
Regards
Manos
2025-06-08 1:15 AM
Hi,
I am dumping the TSZ121 and driving the MSP430i2xxx input directly.
The only compromise here is lower input impedance for certain conditions.
Regards
Manos