Hi everyone, i am using the TSZ121 as a high to low impedance match stage in order to drive a differential MCU (MSP430i20x). The input stage seen below comprises several mosfet optocouplers (see C1-C5) that shape the input attenuation. C1-C5 is simply their cut-off state inherent capacitance. R6 is also the output of a mosfet optocoupler acting as shorted/non-shorted input for ADC offset calibration.
The image seen below depicts DC simulation and everything seems as expected.
However, on my pcb, i am measuring around 20mV between OUTB & GND and 70mV between OUTA & GND, provided that P1 trimmer is almost exactly centered (adjusted so that center tap is in the middle of adjustment range).
The PCB was re-flowed very carefully with a stencil and everything seems near-perfect.
R5 & R7 are 0Ω.
The pcb was cleaned with an ultrasonic cleaner which as proven after quite a few iterations at work is a very good solution for wiping out leakage between high impedance nodes. Looking at the PCB with a 100 euro Aliexpress microscope does not reveal any residue at all.
I have struggled with this issue for a few days but could not find the culprit.
I have measured between either INA/INB and GND and the resistance is nearly 12.5MΩ as expected. This proves that there is no leakage between either the TSZ121 non-inverting inputs and GND and that the potentiometer P1 is almost perfectly centered.
R1 and R2 either consist of 5x2MΩ 0.1% thin film resistors.
Can anyone guess what i am missing here?
Thanks for your time.
Manos
