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EVALSTGAP2HDM

arjunkc
Visitor

Hi,

We have been testing our H-bridge on 2 EVALSTGAP2HDM with IPP026N10NF2S MOSFETs. The gate resistances are as per the EVAL board. We are seeing huge ringing on the gate signals for the low side FETs on both boards with no load connected. The high side gate signals are clean and no ringing is observed. We have tested the board with both +15/0 V and +15/-3 V configuration and ringing is observed in both cases. I have attached the gate waveforms for the low side FETs for both configuration. This gate ringing is then translated to the output voltage waveform with huge VDS voltage overshoots, sometimes double the DC bus. The DC bus voltage is 24 V, switching frequency of 100 kHz and the dead time inserted is 100 ns. We expect the Miller clamp to be working here but it seems it is unable to do it. We are unable to load the circuit because of this current issue. We would appreciate you quick response to solve this issue so that we could proceed for further testing phase.

 

Thanks

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