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[SPC582B-DIS] SVD registers definition showing all zeroes

FPros.1
Associate III

Hi there,

debugging serial demo for SPC582B I was hoping to observe internal LINFLEX_D1 registers for future use during application debug.

An ST employee helped me setting up the launch configuration, especially setting:

SVD Path: C:\SPC5Studio-6.0\openocd\svd\spc58\SPC582Bx.svd

 

During debug, all the peripherals are shown (inside the view 'Peripheral'). In the viw 'Memory', I can see the registers listed but their runtime values seem all 0s. If I add the same register as a watch expression, the actual value is 0x8184 (and it makes sense).

 

Could the SVD file be broken or is it something else?

 

Thanks for the support,

FP

1 ACCEPTED SOLUTION

Accepted Solutions
Erwan YVIN
ST Employee

Hello ,

sorry for my late answer

There are fonction to enable PCTL :

void pal_init(PALConfig *config) {
  // art #804106 Coredump issue on freegcc
  volatile uint16_t i;

#if defined(SPC5_SIUL2_PCTL)
  /* SIUL clock gating if present.*/
  SPCSetPeripheralClockMode(SPC5_SIUL2_PCTL,
                            SPC5_ME_PCTL_RUN(2) | SPC5_ME_PCTL_LP(2));
#endif

         Best regards

                          Erwan

View solution in original post

5 REPLIES 5
Erwan YVIN
ST Employee

Hello , 

could you confirm the version of openocd or pls used ?

before to seeing the contents of the registers , you should enable the current PCTL.

try a test application for debug to display Peripheral.

             Best Regards

                          Erwan

                        

Hi Erwyn,

thank you for the prompt reply.

 

Openocd version (used with SPC582B-DIS + stellar link winUSB driver):

C:\SPC5Studio-6.0\openocd\bin>openocd.exe --version
Open On-Chip Debugger 0.12.0+dev-00318-g0e98d766e (2023-05-17-15:52)

 

Is there a guide about enabling PCTL for the desired peripheral?

 

Thanks for the support,

FP

Hi Erwyn,

is there any update on this?

 

Regards,

FP

 

Erwan YVIN
ST Employee

Hello ,

sorry for my late answer

There are fonction to enable PCTL :

void pal_init(PALConfig *config) {
  // art #804106 Coredump issue on freegcc
  volatile uint16_t i;

#if defined(SPC5_SIUL2_PCTL)
  /* SIUL clock gating if present.*/
  SPCSetPeripheralClockMode(SPC5_SIUL2_PCTL,
                            SPC5_ME_PCTL_RUN(2) | SPC5_ME_PCTL_LP(2));
#endif

         Best regards

                          Erwan

Hi Erwyn,

 

thanks for your help.

In my case, hardware registers' value were not showing for LIN UART peripheral so I am not sure your solution could solve my issue.

Anyway, in the mean time, ST support helped providing a patched version of SVD file for SPC582B mcu (other mcus were affected too), containing definition of a couple of missing registers in the LIN UART peripheral.

I am sure these patched SVDs will be part of future update(s). 

 

Thanks again 🙂

FP