2025-10-27 8:42 PM - edited 2025-10-28 1:07 AM
I want to read the FIFO of IIS2ICLX, but I found that INT1 only triggers once when the power is first turned on. This is my initialization code. Is there anything wrong with this initialization?
I triggered the interrupt through the rising edge. Once the interrupt occurred, an event would be sent. I measured the level of the interrupt pin, and it remained constant.
iis2iclx_xl_full_scale_set(&dev_ctx, IIS2ICLX_500mg);
/* Configure filtering chain(No aux interface)
* Accelerometer - LPF1 + LPF2 path
*/
iis2iclx_xl_hp_path_on_out_set(&dev_ctx, IIS2ICLX_LP_ODR_DIV_10);
iis2iclx_xl_filter_lp2_set(&dev_ctx, PROPERTY_ENABLE);
iis2iclx_fifo_xl_batch_set(&dev_ctx, IIS2ICLX_XL_BATCHED_AT_104Hz);
iis2iclx_xl_data_rate_set(&dev_ctx, IIS2ICLX_XL_ODR_104Hz);
s_sample_rate = 104.0f;
iis2iclx_fifo_watermark_set(&dev_ctx, 112);
iis2iclx_fifo_mode_set(&dev_ctx, IIS2ICLX_FIFO_MODE);
iis2iclx_pin_int1_route_t int1_route;
int1_route.int1_ctrl.int1_fifo_th = 1;
int1_route.int1_ctrl.int1_fifo_ovr = 1;
int1_route.int1_ctrl.int1_fifo_full = 1;
int1_route.int1_ctrl.int1_cnt_bdr = 1;
iis2iclx_pin_int1_route_set(&dev_ctx, &int1_route);
2025-10-28 1:04 AM
i tryed INT2, it have same probelm
2025-10-28 7:50 AM - edited 2025-10-28 7:51 AM
Hi @Alpha_Lee ,
Try this: start by enabling only int1_fifo_th (watermark interrupt). Test behavior, then add other interrupts as needed.
After INT1 triggers, read the FIFO data or the interrupt status registers to clear the interrupt condition. This will de-assert the INT1 pin and allow new interrupts.
You could also lower the FIFO watermark to a smaller value (e.g., 16 or 32) for more frequent interrupts.
2025-10-28 6:35 PM - edited 2025-10-28 6:47 PM
I set FIFO watermark 16, and enable only int1_fifo_th, but it still can't work.
switch (iis2iclx_event)
{
case EV_FIFO_FULL:
{
/* Read output only if new value is available */
iis2iclx_fifo_status2_t fifo_status;
iis2iclx_fifo_status_get(&dev_ctx, &fifo_status);
if (fifo_status.fifo_ovr_ia == 0) {
/* Read magnetic field data */
uint8_t fifo_data[112];
iis2iclx_read_reg(&dev_ctx, IIS2ICLX_FIFO_DATA_OUT_TAG, fifo_data, sizeof(fifo_data));
...
}
...
}
...
}This is my code, after INT1 triggers, it will sent a event, then read fifo_status2 and FIFO_DATA_OUT.
Furthermore, I found that although INT1 was not triggered, but the fifo_data_level register was indeed increasing.