IIS2DH aliasing at low ODR settings

[THart.14]

AFAIK the IIS2DH has no anlog anti aliasing filter. So will aliasing occure if I use low ODR settings and the input signal is frequency is higher than ODR/2? Because in our test we are getting quiten often spikes in the signal output signal.

And if this is the case we could only crank up the sampling rate?

[Eleon BORLINI · Accepted solution]

Hi @THart.14​ ,

A little aliasing effect will probably occur, but the folded signal should be very attenuated.

This is for example the frequency response of the Z axis, that shows that the signal is very attenuated above 2kHz (which is half of the maximum ODR setting, Low-power mode (5.376 kHz)).

 

-Eleon

[THart.14]

Thx, for your response.

But at lower ODR settings the chip will use lower ADC sampling rates eg at ODR=200Hz or 400Hz, thus this will lead to aliasing effects?

[THart.14]

Please could you clarify that in the case not properly low pass filtered input acceleration data the only way to avoid aliasing is to set ODR to 5376Hz?

[Eleon BORLINI]

Hi @THart.14​ ,

for lower than maximum ODR there is a low risk of aliasing folding, but the signal will be very attenuated.

-Eleon