On Thursday, June 29, 2023, I attended the "STM32H5: Ultimate combination of performance, integration and affordability" workshop, which I find very interesting. Workshop participants were informed that the slides and a voucher to order the STM32H5 d...
I have to deploy an algorithm with a lightweight deep learning-based approach on a low-power STM System-on-Chip based on an Arm Cortex-M-class MCU or Arm Cortex-A-class MPU. Is there a way to reduce cache-misses or a way to reduce the CPU stalls on c...
I am working on register level programming, and I have gone thoroughly the reference manual it just contains about the features of the peripherals and registers and something about its working so how can I program if it does not contain the procedure...
The STM32U5 has HS PHY and it's slower than the STM32H5 so why doesn't the H5 have HS PHY or any HS USB support? Will a version that does be released in future? Its almost the perfect chip to use for a future project I have in mind aside from the lac...
HiHow can we define separate frequency for open drain and push pull modes for I3C communication ?In the documentation only the low phase is mentioned but for high phase there's no separate option for OD & PP modes. Ideally I would like to do somethin...
Using the latest STM32CubeIDE, STM32CubeH5 and NUCLEO-H563ZI with TrustZone disabled.I put a breakpoint at the first instruction in startup in Reset_Handler. The debugger shows in SFRs, SCB->VTOR_S is 0x8000000 (which is my NSBOOTADD) and SCB->VTOR_N...
Hi,I am working on freertos plus tcp library with STM32H563ZI, but how must I make memory otions in linker file?like: RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 320KFLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2048KRAM1 (xrw) : ORIGIN = 0x20000000, LENG...
Hi, I would like to test the EMW3080 with the STM32H5, as I understand it is necessary to load the firmware provided by the ST in order for the EMW3080 to work with the driver provided for the B-U585I-IOT02A board. Correct?Does ST have plans to laun...
I try to figure out what the correct UCPD clock frequency is.RM0456 in section 74.4.2 UCPD reset and clocks states:"The receiver is designed to work in the clock frequency range from 6 to 18 MHz. However, the optimum performance is ensured in the ran...
I see this: (on NUCLEO-H563ZI board) JTAG chain detection found 2 devices: #0 Id: 0x6BA00477, IRLen: 04, CoreSight JTAG-DP #1 Id: 0x06484041, IRLen: 05, Unknown device What is the device #1 ?