Two single-ended ADC inputs vs differential ADC

[MMehr.1]

Hello,

Does STM32F7 support differential or pseudo analog reading?

Also Other than that if we read two single ended channels which are connected to a differential pair and then in software we do the common mode rejection does it have the same performance as the common mode rejection hardware level?

In those ADCs that support differential inputs they do common mode rejection during sample and hold time, but if they do not have this feature we need to do common mode rejection in software.

Please consider I can not use differential op amp before ADC.

Regards,

ME

[TDK]

> Does STM32F7 support differential or pseudo analog reading?

The ADC on the F7 is single-ended only. Differential can be post-processed if both sides are within 0 to VREF+.

> does it have the same performance as the common mode rejection hardware level?

In general, no, but it might work just fine if your common mode frequency response is DC.

[MMehr.1]

Thanks TDK,

​

Why the inputs should be below VREF?

​

What does it mean exactly "​

​common mode frequency response is DC."?

​

In other words when it is not possible to use ADC inputs in this way?

​

Regards,

ME​

​

[TDK]

> Why the inputs should be below VREF?

The range of the ADC is 0 to VREF+.

> What does it mean exactly "​​common mode frequency response is DC."?

The problem is that you're not measuring all channels at the same time, in general. So if you subtract off the common mode in software, you will have a nonzero error if the common mode has some frequency content and is not just a DC offset.

> In other words when it is not possible to use ADC inputs in this way?

If your inputs are outside the 0 to VREF+ range, this won't work.

[Ozone]

> In those ADCs that support differential inputs ...

Differential means in this context the difference between two inputs.

As TDK said, STM32 MCUs do not support real differential inputs, only 0V ... +Vref.

Value of both inputs must fall in this range.

[waclawek.jan]

Look into errata. Isn't there a much more restricting requirement for the common mode voltage for differential mode?

JW