Timer output compare channel frequency problem

[xinyancode_na]

Posted on September 11, 2016 at 02:41

Hi, everyone,

I am using STM32F407, want to output a PWM signal using Timer 1 output compare function. the system clock rate is 168MHz, and input clock of Timer 1 is also 168MHz, no clock division applied.

in TIM1_CC_IRQHandler() ISR, I update CCR1 with the operations like this:

GPIO_ToggleBits( GPIOD, GPIO_Pin_15 );    //toggle a output signal

capture = TIM_GetCapture1( TIM1 );

TIM_SetCompare1( TIM1, capture + CCR1_value);

When CCR1_Value is larger than 250, the output PWM signal is correct, period and duty cycle are all correct. But when CCR1_value is lower than 200, the Period and duty cycle of PWM is wrong. it seems the timer can not handle so fast change.

Does anybody have some experience on this point? thank you for any suggestion and comments.

[mark239955_stm1]

Posted on September 11, 2016 at 04:27

The GPIOx->OSPEEDR register, for each GPIO port, is used to configure the maximum output speed of the GPIO port pins.

Have you set it up for the pin from which you're outputting the PWM signal?

[Tesla DeLorean]

Posted on September 11, 2016 at 10:11

It is far more probable that you are saturating the processor in your interrupt code,consuming too many CPU cycles.

The TIM can operate at very high speeds, you might need to use DMA and Toggle Mode to get beyond the limits of your software.

You could check optimization level or use assembler to increase speed, but your system would have little time to perform useful work.