STM32L4 Datasheet error LSE CSS

[Clonimus74]

Posted on October 29, 2017 at 14:59

In the datasheet it is written:

'A Clock Security System on LSE can be activated by software writing the LSECSSON bit in

the Control/status register (RCC_CSR).'

This bit is not in the CSR register but in the BDCR register.

[Imen.D]

Posted on October 30, 2017 at 13:37

Hello

Ofri.Igal

,

Thank you for

reporting this typo

and bringing it to our attention.

I confirm this typo error and reported it internally to correct the related reference manual in coming release.

Kind Regards

Imen