STM32G473VET6 Default pin configurations

[GSing.21]

As i red from reference manual most of the pins are in analog mode and pins are configured as per reset value of GPIOx_MODE/GPIOx_PUPDR/...so many other register but i want to know which pins function have assigned to individual pins.

[Uwe Bonnes]

Have a look at the datasheet section 4

[GSing.21]

Hi Bonnes,

Thanks for replying.

Yes there is pin name given with package name, but there was not mentioned any default pin config/state

[Uwe Bonnes]

Match with the GPIO register description in the reference manual chaper 8.4

[GSing.21]

I already went through this section, from these GPIO reset value(Default) i can find only GPIO's Mode, GPIO's Pull-up/pull-down, there is one statement mentioned in section 9.3.1 saying "most of the I/O ports are configured in analog mode" here what does mean by "most of the I/O port" ? some of the pins have no analog function so which function assigned to those pins after reset(Default) ? and some pins have more than one analog functions like ADC, COMP, OP-amp, so which analog function will assign to those pins after rest(Default)

[KnarfB]

There is a difference between a I/O pin beeing configured in "analog mode" and an I/O pin assigned to an alternate function (which may be analog or digital or nothing). Referring to RM0440 "Reference manual STM32G4 Series advanced Arm®-based 32-bit MCUs" Rev 5:

Figure 30. High impedance-analog configuration shows the "analog mode". Main feature is, that digital input (Schmitt-Trigger) and output stages are switched off --> less power consumption. This does *not* imply that some useful alternate function (like ADC) is connected to that pin, its only the IO block that is in analog mode.

The mode of a pin is set in GPIOx_MODER registers, while its alternate function (AF0 .. AF15) is selected in GPIOx_AFRy registers.

Table 57. "GPIO register map and reset values" summarizes registers and their reset vaules:

Most pins are in mode 11 after reset, which is analog mode, see Table 56. "Port bit configuration table".

The AF multiplexers are in state AF0 after reset (9.3.2). These bits detemine to which on-chip function block (like ADC) an IO block is connected.

But, this is unfortunately explained in another document, see data sheet DS12712 Rev 3 Table 13. "Alternate function": AF0 is mostly "nothing" or a system function for few pins.

hth

KnarfB