STM32G031J6 pin remapping?

[William Ransohoff]

Hi there,

Has anyone figured out how GPIO pin remapping works on the 8-pin STM32G031J6 chips? The datasheet lists several different pads connected to each pin, and I only see remapping bits for PA9/11 and PA10/12 in the SYSCFG registers. For example, pin 4 has PA0/PA1/PA2/PF2 assigned to it.

Can we configure which pads are actually connected to the pins, and are there any reference documents describing that process? Or are all of the listed pads always connected to the pin, and does that mean that we need to ensure that only one GPIO is configured as anything other than 'floating input' at any given time?

When I try to configure PA0 as a push-pull output on the STM32G031J6, my program crashes with a hard fault. But the same program works when I use PA8 instead. I'm guessing that happens because PA0 shares a pin with PF2 which is configured as the chip's reset signal by default, but I can't find any documentation explaining how things should work.

Thank you very much.

[William Ransohoff]

Okay, in case anyone else has this question, I think that I found the answer in section 4.3.4 of AN5096, "Getting started with STM32G0 Series hardware development":

"A multi-bonding approach is used on the small packages in order to offer a maximum of alternate functions and analog inputs. This approach results in multiple die pads connected internally to a single package pin.

[...]

Taking pin 1 as a concrete example; this multi bonding means that for this pin, each of the alternate functions (PB7, PB8, PB9 orPC14) are accessible on this pin if they are respectively configured at I/O port level.

The configuration state of each device pad must be done carefully as there are not any design protections present to avoid interferences from one pad to the other. By default, all GPIOs (except PA14 in this example) are configured in analog input; this must be taken into consideration before modifying the analog input configuration for another configuration state."

So unless I'm mistaken, it sounds like all of the listed pads are always connected to their respective pins in the SOIC8 package. Is that right? And if it is right, does that mean that when I set PA0 to push-pull output, it pulls the pin to 0 and initiates a device reset? Or is it actually a fault triggered by conflicting signals in the chip?

[Elektrik]

Sorry for reviving old thread, but yes, it is possible to lock-up the chip by misconfiguring the IOs. I further discuss this in my thread: https://community.st.com/s/question/0D53W00000DIn3HSAT/stm32g031j6-stuck-in-non-programmable-mode

[S.Ma]

Several gpios are shorted together in the package instead of shorting them outside with jumper wire. Of course the sw must be smart configuring the ios.