STM32F401RE - Size of TDR buffer in USART peripheral

[Dimitris Paraskevopoulos]

Posted on September 03, 2016 at 14:06

Hi all,

I was looking at the reference manual for the USART peripheral and I saw that there are two buffers TDR & RDR (Transmit and Receive Data Register) between USART_DR (Data Register) and their respective Shift registers.

I looked around but I couldn't find any information on this buffer.

Can someone please enlighten me?

#stm32f4-stm32f401re-usart

[Tesla DeLorean]

Posted on September 03, 2016 at 16:43

Yes there is basically one holding register, and one shift register for each the transmit and receive paths. There is no buffering or FIFO in play here, and peripheral registers don't behave like memory cells, the logic, registers and gates behind the address is often quite opaque from the processor's perspective. What you write in one register can be quite disconnected from the value read from the register at the same address. ie you can't inspect what you just wrote.