STM32F4 Two Complementary PWM Outputs does not have the same frequency

[minhpc91]

Posted on January 21, 2015 at 05:29

Have anyone ever had trouble when updating frequency can cause the two complementary pwm outputs not have the same frequency?

I'm using STM32F407VGT6 Discovery, controlling the PWM frequency.

static void TIM1_Configuration(void)

{

/* Time Base configuration */

TIM_TimeBaseStructure.TIM_Prescaler = 0;

TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_CenterAligned1;

TIM_TimeBaseStructure.TIM_Period = Timer_Period;

TIM_TimeBaseStructure.TIM_RepetitionCounter = 0; // update event is generated at each counter overflow

TIM_TimeBaseInit(TIM1, &TIM_TimeBaseStructure);

TIM1->EGR = TIM_PSCReloadMode_Update;

TIM1->CR1 |= TIM_CR1_URS;

TIM1->CR1 &= (uint16_t)~TIM_OPMode_Single;


/* Channel 1, 3 Configuration in PWM mode */

TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM2;

TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; //Co the dung 2 lenh nay de ngat xung

TIM_OCInitStructure.TIM_OutputNState = TIM_OutputNState_Enable;

TIM_OCInitStructure.TIM_Pulse = Channel_Pulse;

TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High; //Khong lien quan den trang thai sau khi ngat xung

TIM_OCInitStructure.TIM_OCNPolarity = TIM_OCNPolarity_High; //Khong lien quan den trang thai sau khi ngat xung

TIM_OCInitStructure.TIM_OCIdleState = TIM_OCIdleState_Reset;

TIM_OCInitStructure.TIM_OCNIdleState = TIM_OCNIdleState_Reset;

TIM_OC1PreloadConfig(TIM1, TIM_CCMR1_OC1PE);

TIM_OC1Init(TIM1, &TIM_OCInitStructure);

TIM1->CR1 |= TIM_CR1_ARPE; // Set the ARR Preload Bit


/* Automatic Output enable, Break, dead time and lock configuration*/

TIM_BDTRInitStructure.TIM_OSSRState = TIM_OSSRState_Disable;

TIM_BDTRInitStructure.TIM_OSSIState = TIM_OSSIState_Disable;

TIM_BDTRInitStructure.TIM_LOCKLevel = TIM_LOCKLevel_OFF;

TIM_BDTRInitStructure.TIM_DeadTime = 0;

TIM_BDTRInitStructure.TIM_Break = TIM_Break_Disable;

TIM_BDTRInitStructure.TIM_AutomaticOutput = TIM_AutomaticOutput_Disable;

TIM_BDTRConfig(TIM1, &TIM_BDTRInitStructure);


/* TIM1 counter enable */

TIM_Cmd(TIM1, ENABLE);//1Tcy


/* Main Output Enable */

TIM_CtrlPWMOutputs(TIM1, ENABLE);

}


void TIM1_PWM_Freq_Update(void)

{

TIM1->CR1 |= TIM_CR1_UDIS;


TIM1->ARR = Timer_Period;


TIM1->CR1 &= (uint16_t)~TIM_CR1_UDIS;

}

[minhpc91]

Posted on January 21, 2015 at 05:43

I have just taken some retests, disabling the complementary output. And I found out that the frequency difference also occurs between two active PWM output Channel 1 (PA8) and Channel 3 (PA10).

It occurs both between two complementary outputs and between two outputs of two channels

[Tesla DeLorean]

Posted on January 21, 2015 at 06:50

Could it relate to Center Aligned counting?

TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_CenterAligned1;

Also fully qualify the initialization so it doesn't do random things. TIM_TimeBaseStructure.TIM_ClockDivision = TIM_CKD_DIV1;

[minhpc91]

Posted on January 21, 2015 at 08:25

Thanks for your comments. 

I have rechecked all upcounting, downcount, centeraligned mode, but the problem still remains.

I also had better take fully initialization like your comment. But it is not work, too. :(

[waclawek.jan]

Posted on January 21, 2015 at 09:03

Post a minimal, but complete compilable code exhibiting your problem.

JW

[minhpc91]

Posted on January 22, 2015 at 06:01

Sorry.

I'm using Kit STM32F407VG Discovery to control frequency of FullBridge LLC Converter. I use 50kHz Interrupt TIM2 and CH1,1N,3,3N PWM TIM1. The PWM frequency band is 80-140kHz.When updating new frequency (TIM1->ARR), the frequency of 4 PWM outputs is randomly not the same, shortcircuiting my converter.

I have no idea to do next. Please help me!!