STM32F4 DMA streams init sequence

[tg.developer]

Posted on January 23, 2014 at 12:49

Hello all,

while implementing two different tasks for DMA2 transfer, which of course

uses different streams and channels I have noticed, that stream initialization sequence

plays some role. For example I am using stream 3 and stream 1 and if I initialize

first stream 3 followed stream 1, then sometimes happens, that data is not transferred

in the right way. If start-up sequence initializes first stream 1 followed stream 3 I am

not experiences any troubles. In my case interaction is between DCMI-SDRAM-SD

which all uses DMA to transfer data.

Could someone give me some explanation of this curious case? 

Since I do not know the reason why is this like explained I am worried, that this is not

just some coincidence and later my fails!

Second question is, in what relationship are DMA streams and DMA channels. Like I see

number of streams are the same as numbers of channels, but in some examples stream

number does not match channel number! Why this reason? I also tried to change channel

number and DMA fails. 

regards

[waclawek.jan]

Posted on January 23, 2014 at 17:08

Without attempting to understand your problem, have you read the Errata, namely item 2.1.10?

JW

[tg.developer]

Posted on January 23, 2014 at 22:54

I am not sure to which errata you are referring. My device is STM32F427ZG.

In errata is mentioned SDIO HW flow control, which could bring DCRCFAIL

what I receive, but this flow control is disabled. 

[raptorhal2]

Posted on January 24, 2014 at 04:23

Each stream is a transfer of data between a peripheral and memory. Each DMA can have up to 8 streams active at once. Peripherals are connected to streams via fixed channel assignments. There is a table for each DMA in the F4 reference manual DMA section that identifies these assignments. When you changed channels and the transfer failed, you probably made an incorrect assignment.

Cheers, Hal

[waclawek.jan]

Posted on January 24, 2014 at 08:34

> I am not sure to which errata you are referring. My device is STM32F427ZG.

Ah. I was referring to errata to the 40x/40x sub-group - it appears to have a bug specific to DMA2 serving peripherlas with built-in FIFO (DCMI, CRYPTO, and HASH). There is no such bug mentioned in the '427 errata.

JW

[Amel NASRI]

Posted on February 18, 2014 at 17:16

Hello all,

Have you seen the new application note AN4031 describing how to use DMA with STM32F2 & STM32F4 products? You can find it on this link:

http://www.st.com/web/en/resource/technical/document/application_note/DM00046011.pdf

.

Hope it will be helpful in this case.

Don't hesitate to let us know your feedbacks.

-Mayla-