STM32F0 GPIOx_ODR vs GPIOx_BSRR

[unrealex]

Posted on February 08, 2014 at 13:09

Apart from the register structure what is the difference between GPIOx_ODR and GPIOx_BSRR?

Is GPIOx_BSRR an abstraction layer for GPIOx_ODR? I know that a change in GPIOx_BSRR ''will'' change the GPIOx_ODR but how and what are the diferences?

more info:

-registers description page-162 of STM32F0advanced ARM.pdf

-MCU STM32F051R8

-Board STM32F0DISCOVERY

-compiler arm-none-eabi-gcc -v gcc version 4.8.3

Thanks for your time.

#registers

[Tesla DeLorean]

Posted on February 08, 2014 at 14:54

First thing to understand is that peripheral registers/latches don't act like memory.

There is one set of latches for the GPIO output, writing to ODR gets there relatively directly, writing via BSRR, etc does so via combinational logic to effect the set/reset behaviour against the current context. This doesn't alter the speed at which this can be done. And doing the single write is significantly quicker than a processor based read-modify-write, and is atomic.

[unrealex]

Posted on February 08, 2014 at 15:52

Thanks for the explanation.