STM32F0 (72) SPI 1 Wire Bidirectional with DMA BUG?

[kuldeepdhaka9]

Posted on September 22, 2014 at 08:06

Aim: Read 4 byte from MAX31855 (SPI readonly compatible) using SPI2  1wire bidirectional (using DMA)

Code: (attached)

Note:

 SPI_CR1_BIDIMODE bit set

 SO->MOSI

 DMA

  Channel4->RX

  Channel5->TX (though garbage -- mandatory?)

Expected: everything goes well and no error should occur in read.

Actual: SPI_SR_OVR bit is set and SPI_SR_BSY loop is causing infinite loop(at ''while (SPI2_SR & SPI_SR_BSY);'' in DMA ISR)

Another Try:

clear the SPI_CR1_BIDIMODE bit and connect SO->MISO, everything goes well. (ie read from the slave using 2 wire unidirectional works)

(STM32F072RBT6)

#stm32 #halfduplex #spi #dma

[Uwe Bonnes]

Posted on September 24, 2014 at 11:32

Did you have a look at the reference manual ''Procedure for disabling the SPI''?

[Montassar BEN ROMDHANE_O]

Posted on October 09, 2014 at 11:04

Hi,

I really can't help since your writing a register access based code, no STM32 StdPeriphLib, no STM32Cube HAL... Sorry !

Regards,

Heisenberg.

[stm322399]

Posted on October 09, 2014 at 17:00

It is likely that in half-duplex rxonly mode, the TX is not required. Clock is generated as soon as SPE is set, and stops when SPE is cleared. The RM state this behaviour when SPI is configured in simplex communication (SO on MISO and RXONLY=1). I bet it behave similarly in your case (SO on MOSI and BIDIMODE set).

Reading the 'Procedure for disabling SPI' can help. As soon as the DMA filled its buffer, you can set SPE to 0. Note that at this moment the SPI will certainly be busy receiving an extra byte. When this extra byte is not desirable, set you DMA with 1 byte less in transfer length and receive the last byte manually.