SPI slave using USART-1 in interrupt mode

[Rhodes.Keith]

Posted on August 25, 2016 at 22:23

We are using a STM32F205 CPU in our own board design. We are configuring the USART-1 as a SPI slave with the proper AF functions.

We have the NSS pin configured as hardware mode.

With this configuration, does the NSS signal disable the SCK signal inside the SPI so that the bytes received only generate an interrupt when the NSS signal is low?

What we want is if the NSS signal is high, no interrupts occur in the SPI.

Thanks...Keith Rhodes

#stm32-spi-interrupts

[Tesla DeLorean]

Posted on August 25, 2016 at 23:07

We are configuring the USART-1 as a SPI slave...

Sorry, you lost me there, you've done what?

[Rhodes.Keith]

Posted on August 25, 2016 at 23:55

We have configured USART-1 to be interrupt-driven SPI channel with hardware control.

Does the NSS signal being high block a MOSI SPI receipt of a byte in hardware?

Thanks...Keith

[Tesla DeLorean]

Posted on August 26, 2016 at 11:41

Ok, that just seems like a restatement of the first post, and still lacks specific detail.

Let's try it this way.

Is USART-1 and USART1 the same thing? This is a custom board, assume I know nothing about it's design/configuration.

What pins are you using, and what peripheral are they being assigned too, ie USART1, SPI1.

Show the initialization code so this isn't ambiguous because there isn't a USART1_NSS pin, and the clock is on USART1_CK, and PA9/PA10 don't have SPI mappings.

Also you'd already seem to be in a position to determine what the peripheral does with the NSS pin now. It either gates or it doesn't, and it sounds like it doesn't gate, and I'm really not sure the peripheral provide a control bit for that. The block diagram and register bits should be somewhat illuminating.