SPI RX variable length w/DMA and CRC

[Curtis.Allen]

Posted on October 01, 2015 at 21:25

Hello,

Based on a reply posted in this

/9d5b40d9

 I implemented a SPI/DMA implementation able to receive variable length messages, terminated by CS deassertion.

Since this is a DMA/SPI implementation, will the CRC be calculated correctly if the transfer is terminated prematurely?

Thanks

#dma #spi #stm32f1

[Tesla DeLorean]

Posted on October 01, 2015 at 22:06

The CRC needs a bunch of baby sitting on the TX side.

On the RX side I'd half expect the CRC remainder to be zero upon completion, as the data and the host side generated CRC have divided through the receivers CRC generator/checker. Pretty sure the ''is it correct'' flag is a zero check. My other half worries they screwed it up.

Haven't had cause to tinker with it myself, but it shouldn't be that hard to confirm if it functions as required.