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BSchm.6
Associate II
May 10, 2023
Question

SM32F411, SPI slave without NSS still receives data

  • May 10, 2023
  • 4 replies
  • 2334 views

Hi,

I have configured an SPI as receive-only slave in CubeMX and have set NSS to "Hardware input signal":


_legacyfs_online_stmicro_images_0693W00000bjkvVQAQ.pngFrom logical point of view I now would expect, that there are no SPI data received, as long as NSS stays at high.

However, the CubeMX-generated code still jumps into the SPI-ISR SPI1_IRQHandler() also when NSS is not at LOW.

So my question: what am I doing wrong? How do I have to configure the SPI to respect the NSS/SYNC signal on receiving?

Thanks!

This topic has been closed for replies.

4 replies

waclawek.jan
Super User
May 10, 2023

Which pin is set as NSS, how exactly is it set in GPIO, and what's its is state?

Generally, read out and check SPI and related GPIO registers content.

JW

BSchm.6
BSchm.6Author
Associate II
May 10, 2023

In case of SPI1, the NSS-pin is PA4. But this is not a GPIO-pin, CubeMX deals with it as SPI-NSS-pin where no possibilities exist to have the generic GPIO settings. And within the SPI-settings I can not change any parameters for this pin except than turning NSS on or off ("NSS signal type" is "Input Hardware" as shown in image above).

waclawek.jan
Super User
May 10, 2023

How is it connected? Read out its level in GPIO_IDR. Measure voltage directly on the pin. Read our and check SPI registered for other SS-related bits.

JW

BSchm.6
BSchm.6Author
Associate II
May 10, 2023

Once again: the NSS-input is NOT an GPIO-pin but a SPI-signal which should be handled by the SPI-hardware! So reading the GPIO-registers for PA4 does not make any sense as the GPI is set to "alternate function" and therefore this register does not reflect the state of the NSS-pin!

The problem is the SPI-hardware not handling the NSS-signal according to what it should do, this SPI-related and has nothing to do with some GPIOs.

In SR-register the flags BSY, OVR (may be because the software is halted in debugger while data transmission is still running), TXE and RXE are set.