RAMECC interrupt enable register (RAMECC_IER)
I am trying to test code which has been written to deal with RAMECC errors. The MPU is STM32H753 and I am working on a Nucleo-H753ZI board.
The first problem was how to simulate a RAMECC error. I found the code at https://github.com/STMicroelectronics/STM32CubeH7/tree/master/Projects/NUCLEO-H745ZI-Q/Examples/RAMECC/RAMECC_ErrorCount and I was able to copy the relevant code over to a new project and get it working.
However, I find that the sample code appears to disable all interrupts in RAMECC_IER at memory address 0x52009000 and never turns them back on. In spite of this interrupts do happen and produce sensible numbers in the status registers. However, I find that if interrupts are enabled in RAMECC_IER (specifically if bits 0, 1 or 2 are set) then while interrupts do still occur no sensible numbers are returned in the status registers.
RAMECC_IER set to zero, sensible numbers returned in status registers
RAMECC_IER set to F (all interrupts enabled), status registers are all zeros
What is going on here? Is the documentation wrong?