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s__it
Associate III
February 11, 2022
Question

PLL startup problem

  • February 11, 2022
  • 2 replies
  • 929 views

I'm using STM32F105RBT, and I'm finding that, in certain circumstances, the phase locked loop is failing to become ready.

1) Boot (sysclk = HSI @8MHz)

2) Set PLL with source=HSI(div2) and multiplier=9

3) Enable PLL

4) Wait for PLL ready (waits forever here)

Although the above works ok from a cold boot, it fails after resetting (using NVIC_SystemReset())

Any ideas ?

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2 replies

Tesla DeLorean
Guru
February 11, 2022

Doing anything externally with NRST pin?

CPU doesn't run pseudo code.​

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s__it
s__itAuthor
Associate III
February 11, 2022

There's not much attached to NRST except a 100nF decoupler.