I2C address timeout: how to close communication correctly

[salvatore]

Posted on April 21, 2012 at 11:27

Hi there,

I'm trying to implement an enumeration test on the I2C bus with my own driver

but I haven't figured out how to deal with a timeout on the address.

After I send the address of the slave, if nobody respond within a certain timeout

(25ms in my case) I'd like to close up the communication and go on with the next

address. I tried setting the stop bit on timeout but the bus keep staying busy and in

master mode, and it locks everything up, because the next thing I do is sending a new start condition which won't happen due to the bus being buse.

The spec says that after setting the STOP bit, the stop condition will be actually set

after the next byte. Does this mean that I have to send a dummy byte (which hopefully

is nobody address)? Or is there something I am missing?

Thanks in advanced.

S.

[hzrnbgy]

Posted on April 21, 2012 at 13:51

I use the AF bit in SR1 to detect non acknowledgement of the address

//wait for ADDR set condition and clear ADDR bit or AF failure

do

{

//check status register

sr1 = I2C2->SR1;

}

while(((sr1 & I2C_SR1_ADDR) == 0) & ((sr1 & I2C_SR1_AF) == 0));

sr2 = I2C2->SR2;

[salvatore]

Posted on April 21, 2012 at 15:01

Ok for the Ack failed bit, but if it set what do you next?

Do you set the STOP bit? Is reading the status2 register

necessary even in that case?

Thanks for your help.

[hzrnbgy]

Posted on April 21, 2012 at 15:42

You can consult the manual for that. It takes like two register writes or something

[ColdWeather]

Posted on April 23, 2012 at 12:22

Ok for the Ack failed bit, but if it set what do you next?

 

Do you set the STOP bit? Is reading the status2 register

 

necessary even in that case?

 

 

If AF bit in _SR1 is set (no ACK from a device on address), I would make:

1). readout of _SR2 to complete the state machine,

2). clear of AF by writing '0' to _SR1,

3). issue STOP.

[emalund]

Posted on April 30, 2012 at 15:06

you do not state which chip, but if it is f1xx you must read the arrata.

Erik

[flyer31]

Posted on May 01, 2012 at 12:29

Sometimes it can happen, that a slave keeps the SDA line in low state (waiting for next SCL from master). As far as I know, the STM32 I2C cannot handle such a situation ''automatically''. To clear this ''bus error'', you have to put the SCL line to ''normal output'' (NOT alternate function) and clock out 8 clock bits, with SDA high. After this, every slave should leave the bus, as the slaves should recognize, that the master does NOT acknowledge their data.

So best do this procedure every time you see some ''timeout'' condition on I2C bus.