How To Protect STM32 GPIO From Current Injection When VDD=0v
I am working on a device, based on SAMD21 (DEV1), that interfaces with a different device which is based on the STM32F405RGT6 MCU (DEV2). These two devices share a power source and communicate using UART. Though these devices share a power source, there is a chance that DEV1 can be powered on while DEV2 is not. Because of this, DEV1 can inject current into the unpowered DEV2.
I would like to understand what I can do on DEV1's side to make sure that even in the case described above, the injected current does not damage DEV2. Currently, neither of the devices have any components connected to the rx and tx UART signals.
I see from the STM32's datasheet, that the AMV for input voltage on a five volt tolerant pin is VDD+4v and for all others is 4v. This makes me believe that as long as the voltage is kept below 4v, then the STM32 can survive the 3v3 being applied to its input.
What I plan to do at the moment to protect the STM32 (and potentially the SAMD21) is to add 1k resistors in series with the rx and tx lines. I believe that the STM32 clamps over-voltage on all inputs and this would limit the current to < 3.3mA. Will my solution work to protect the STM32? Or is there something I am missing that would reder this solution ineffective?