How to correctly reassign RAM on STM32H755 for M4 to use AXISRAM and M7 to use SRAM1
I'm essentially trying to swap the RAM modules between the two cores on the STM32H755 so that all data in RAM used by the M7 is in SRAM1-3 and for the M4 is in AIXISRAM, but I'm observing some issues in startup behavior on the M4.
From my understanding of the manual and application notes: the M7 uses the AXISRAM by default (both in D1 domain) and M4 uses SRAM1-3 by default (all D2 domain), but either processor *should* be able to access either domain's RAM.
I have made the following set of incremental changes based on functional testing and guidance in Section 9.5.9 "General clock concept overview" from the manual:
1. Change: Updated linker files (M7 now uses SRAM starting at 0x10000000 and sized 288K for `.bss`, `.data`, and user heap; M4 uses RAM_D1 starting at 0x24000000 and sized 512K):
- Result: Builds succeed for both M4 and M7 targets, but hardfault observed on M7 at startup before debugger reaches M7's `main()`
2. Change: Updated `SystemInit()` in system_stm32h7xx_dualcore_boot_cm4_cm7.c to enable AXISRAM access from M4 via RCC->AHB3ENR and SRAM1-3 access from M7 via RCC->AHB2ENR
- Result: `SystemInit()` completes and debugger reaches M7’s main(). Software times out in main() in Boot_Mode_Sequence_1 block when waiting for M4 to boot and enter in stop mode, Error_Handler() is called
/* AXISRAM block enable - Indicate that AXISRAM is allocated by the M4 */
RCC->AHB3ENR |= RCC_AHB3ENR_AXISRAMEN;
/* SRAMx block enable - Indicate that the 3 SRAM Modules allocated by the M7 */
RCC->AHB2ENR |= (RCC_AHB2ENR_SRAM1EN | RCC_AHB2ENR_SRAM2EN | RCC_AHB2ENR_SRAM3EN);I'm now stuck - the M7 now executes `main()` but stalls and times out waiting for the M4 to enter stop mode and set `RCC_FLAG_D2CKRDY` to `RESET`.
It seems that the M4 application is not being started. I am able to load and start it via debugger after the initial programming, but I observe a sigtrap in the `Reset_Handler` when attempting to jump to the application's entrypoint (e.g. `main()`).
Is it possible to completely swap the RAM modules like this? What piece could I be missing?
What could be preventing the M4 from starting?