How cna i run my programe in the external SRAM?

[heatonhfg]

Posted on November 01, 2009 at 05:50

How cna i run my programe in the external SRAM?

[heatonhfg]

Posted on May 17, 2011 at 13:28

How cna i run my programe in the external SRAM? I can't find any info about SCB->VTOR,I just set like this:

SCB->VTOR = NVIC_VectTab_RAM| ((NVIC_VectTab_ERAM-NVIC_VectTab_RAM) & (uint32_t)0x1FFFFF80);

BUT it can't work any one can help me/?

Thank you,truely!

heatonhfg

[heatonhfg]

Posted on May 17, 2011 at 13:28

by the way,my programe can work,but the interupt can't work,i don't know how to remap the interupt VectorTable,any one can help me out? Thanks a lot!!!

[heatonhfg]

Posted on May 17, 2011 at 13:28

I WANT TO laod the uclinux in the sram,uclinux stored in the spi flash,ST dont't give the source of bootlaoder,so i must write a bootloader for uclinux,so my first step is to run a simple programme with clock in external sram.

now i change my code to NVIC_SetVectorTable(NVIC_VectTab_ERAM,0);

but it don't work too,can you help me out?

Thank you a lot!

[picguy]

Posted on May 17, 2011 at 13:28

In general you don’t WANT to run software in external RAM. As other threads point out it is SLOW. Perhaps 1/10 the speed of code running in internal flash. I see no reason why relocated interrupt vectors would not in external RAM. But again, expect serious slowness.

If you must have code in external RAM your best bet is to copy it to external memory and jump to it. Think overlay as from disk.

Yet if your software in external RAM is some kind of bootstrap speed may not be an issue.

Why is it slow? Cortex-M3 (and IIRC all ARM machines) have separate instruction and data busses. Even at 72 MHz which requires 2 wait states for instruction fetch only branch instructions end up waiting for instruction fetch. (Loading a PC-relative literal is the major exception.)

Put code in system RAM and instruction fetches and data access must share the same bus. I would expect the effective CPU speed to be cut in half. Others may provide accurate numbers.

Now put your code in external RAM and suddenly you are dealing with a 16-bit bus that also uses the data access bus. Can you say SLOW.

[heatonhfg]

Posted on May 17, 2011 at 13:28

thank you,but if i can't do this,how can i run linux in SRAM?

[picguy]

Posted on May 17, 2011 at 13:28

Normally I would say to set the Vector Table Offset Register, address 0xE000ED08. But you can not set the top two bits in that register. Therefore you can’t do what you want purely in external memory. So . . . if you need interrupts reserve a little RAM. Then before you start copy your vector to RAM.

Info found in Cortex_m3_r2p0_trm.pdf on page 171.