FMC SDRAM address,bank mem order - stm32f7

[polimorphic]

Posted on April 14, 2016 at 12:42

Hi all

Assume that I have SDRAM 13rowx10col is connected to stm32f7.

I need to know the order of rows in conjunction with banks.

Is physical address is calculated as follows:

A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 BA1 BA0

or so:

BA1 BA0 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0

Assume address 0xC2000000 or

0x2000000 / 10bit cols = 0x8000 row, the row (and bank) address = 100000000000000b

So this will be significant bit BA1 or A12?

in pdf:

http://www.nxp.com/documents/application_note/AN10935.pdf

on page 16

we see that the bank is the lowest.

But as is in FMC?

[Edit]

I will add

that I have crosstalk on memory buss. The lower 32 MB memory works fine.

While the upper

32MB

memory has errors. I suppose that it is a track A12 which is

in one place

too close to the

SDRAM clock. But I know if I am right that the banks are lower.

Thanks

#sdram-fmc