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Dave Marples
Associate
May 22, 2018
Question

ETB on STM32F20x ?

  • May 22, 2018
  • 1 reply
  • 1032 views
Posted on May 22, 2018 at 10:41

Asking more in hope than expectation really, but does anyone know if the STM32F20x (specifically, STM32F205RB) supports ETB?  J-Link doesn't report it;

CoreSight components:

ROMTbl[0] @ E00FF000

ROMTbl[0][0]: E000E000, CID: B105E00D, PID: 002BB000 SCS

ROMTbl[0][1]: E0001000, CID: B105E00D, PID: 002BB002 DWT

ROMTbl[0][2]: E0002000, CID: B105E00D, PID: 002BB003 FPB

ROMTbl[0][3]: E0000000, CID: B105E00D, PID: 002BB001 ITM

ROMTbl[0][4]: E0040000, CID: B105900D, PID: 002BB923 TPIU-Lite

ROMTbl[0][5]: E0041000, CID: B105900D, PID: 002BB924 ETM-M3

Cortex-M3 identified.

J-Link>etb

ETB is not present.

....and I don't see it in the datasheet either so I'm pretty sure I know the answer to my own question...but having gone to all of the trouble to include the ETM I'm sorta surprised there's no ETB there too....

DAVE

    This topic has been closed for replies.

    1 reply

    waclawek.jan
    Super User
    May 22, 2018
    Posted on May 22, 2018 at 14:20

    ETB means RAM that means silicon area and that means cost per chip.

    Not having included it means only the negligible minority of users who want to trace bear the burden of spending pins and buying the exorbitantly expensive trace tools.

    JW

    Dave Marples
    Associate
    May 24, 2018
    Posted on May 24, 2018 at 10:50

    Jan,

    Thanks for the replyt, but I guess that's no then? :) Some vendors allocate the ETB RAM in a re-usable block so it doesn't need to be dedicated to ETB all of the time....that seems like a nice compromise - I can often forsake some function of my application while I'm trying to figure out how I'm in the hardfaultHandler...

    (Oh, and I agree about price of the trace tools!  The Orbuculum project is building free/Free alternatives, but it's a way off completion yet).

    Regards

    DAVE

    waclawek.jan
    Super User
    May 24, 2018
    Posted on May 24, 2018 at 13:02

    Thanks for the reply, but I guess that's no then? :)

    I'm not ST, but given what you've written and what's in DBG chapter of RM0033... Yes, no. :D

    Some vendors allocate the ETB RAM in a re-usable block

    In Cortex-M3/M4? Not that I couldn't imagine it, but I guess there are tradeoffs...

    At the end of the day, this is just another tool in the developer's toolbox - and while it may be useful, it needs to be learned and taken care for too. During the years I've gradually learned to pay less and less attention to any particular debugging (or development for that matter) technique (and even less if it's been promoted loudly in the glossy material), as at the end of the day it's the complete mix which counts. YMMV.

    JW