dead-time insertion for only one channel

[wochenendpost]

Posted on February 23, 2014 at 19:14

Hello,

I use TIM1 to generate a clock-signal at the gpio-output-pin TIM1_CH1. This signal will be generated until a rising edge is detected at TIM_ETR (gpio-input). So the output-signal will be immediately pulled down to low as you can see in screenshot (after a detected TIM_ETR). So far, so good.

This really short pulse with an immediately low after the rising edge is to fast (you can see it in the attatched screenshot). So I try to expand/stretch the last pulse with a dead-time insertion. But this is not working at me.

I hope somebody can hint me.

{

    TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;

    TIM_OCInitTypeDef       TIM_OCInitStructure;

    TIM_BDTRInitTypeDef        TIM_BDTRInitStructure;

    /* TIM DISABLE counter */

    TIM_Cmd(TIM1, DISABLE);

    /* System Clocks Configuration */

    /* TIM1 clock enable */

    RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM1, ENABLE);

    /* Time base configuration */

    TIM_TimeBaseStructInit(&TIM_TimeBaseStructure);

    TIM_TimeBaseStructure.TIM_Period = 72;

    TIM_TimeBaseStructure.TIM_Prescaler = 0;

    TIM_TimeBaseStructure.TIM_ClockDivision = TIM_CKD_DIV1;

    TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;

    TIM_TimeBaseInit(TIM1, &TIM_TimeBaseStructure);

    /* Output Compare Toggle Mode configuration: Channel1 */

    TIM_OCStructInit(&TIM_OCInitStructure);

    TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_Toggle;

    TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;

    TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;

    TIM_OC1Init(TIM1, &TIM_OCInitStructure);

    /* enable the choose to stop the timer on rising/falling edge at external

     * pin PA12 (=CAM_READ) */

    TIM_ClearOC1Ref (TIM1, TIM_OCClear_Enable);

    TIM_ETRConfig (TIM1, TIM_ExtTRGPSC_OFF, TIM_ExtTRGPolarity_NonInverted, 0);

/* down HERE !!!  seems to be my problem ??? */

/* ==================> */

    /* Automatic Output enable, Break, dead time and lock configuration*/

    TIM_BDTRStructInit(&TIM_BDTRInitStructure);

    TIM_BDTRInitStructure.TIM_OSSRState = TIM_OSSRState_Disable;//TIM_OSSRState_Enable;

    TIM_BDTRInitStructure.TIM_OSSIState = TIM_OSSIState_Enable;

    TIM_BDTRInitStructure.TIM_LOCKLevel = TIM_LOCKLevel_OFF;

    TIM_BDTRInitStructure.TIM_DeadTime = 72;

    TIM_BDTRInitStructure.TIM_Break = TIM_Break_Disable;

    TIM_BDTRInitStructure.TIM_BreakPolarity = TIM_BreakPolarity_Low;

    TIM_BDTRInitStructure.TIM_AutomaticOutput = TIM_AutomaticOutput_Enable;

    TIM_BDTRConfig(TIM1, &TIM_BDTRInitStructure);

    TIM_OC1PreloadConfig(TIM1, TIM_OCPreload_Disable);

    TIM_CtrlPWMOutputs(TIM1, ENABLE);

}

[wochenendpost]

Posted on February 26, 2014 at 01:25

Reading in datasheet and application_notes does not solve my problem. I hope someone can give me a little hint.

[waclawek.jan]

Posted on February 26, 2014 at 10:12

You can't do that. You did not mention which model are you using, so look for example at RM0090 rev.6 (for 'F4xx) fig.114 - the ETR input throttles the OC1Ref signal, while the positive/negative ''splitter'' where the dead time insertion happens comes after this.

[EDIT] I take this back - this is the reason why dead time insertion *can* be used to make a pulse longer. However, looking at Fig.120 in the same RM0090, to delay OCxRef's trailing edge, OCxN output has to be utilized (and perhaps inverted, by setting CCxNP=1). Note, that all pulses then be longer.

JW