Clock cycle behavior as a function of frequency

[TGA.1]

Hello,

On the STM32F746ZG I measure the clock cycle needed to execute a code thanks to a timer which runs at the same frequency as the core clock.

However, for the same code, with exactly the same measurements process, the clock cycle needed to execute the same code is not the same over all frequencies. Normally, the clock cycle to execute a code should be the same over all frequencies.

I did the same test on a STM32F446ZE and it works as expected, i.e. same clock cycle over all frequencies.

For example, here the clock cycle behavior for the execution of a basic addition with a for loop within a STM32F746ZG.

Is someone has ever seen this behavior ? Is someone has an explanation ?

Thank you,

[waclawek.jan]

Do you use any "library" such as Cube/HAL, which sets up the clocks? Then it is likely to set up FLASH waitstates as function of system clock frequency.

Otherwise, post a minimal but complete compilable code exhibiting the problem.

JW

[TGA.1]

Hello JW,

Yes I use CubeMx to configure the basics of my projects, particularly the clock. Sometimes I use Hal_Delay function. I have one project per frequency tested, e.g. one project configure for 1 MHz, one project configure for 4MHz, etc.

I did not think about the wait states. I will try to put the code in the RW section, according to the reference manual there is 0 wait states for read and write operations from the SRAM.

I will also check the F446 project. There is also wait states with Flash on this MCU depending on the core frequency, but the weird behavior of the clock cycle does not appear

[Piranha]

Is L1 I/D-cache enabled? Does firmware run from ITCM or AXI? On parts with 4KB I/D-cache the ITCM with ART and prefetch tends to perform better. Anyway, read the AN4667.